Abstract: A data bus subscriber and a method for processing data, wherein the data bus subscriber can be connected to a local bus, particularly a ring bus, and the data bus subscriber has an input interface, which can be connected to the local bus, for receiving first local bus data, an output interface, which can be connected to the local bus, for transmitting second local bus data, a processing component for synchronous processing of the first local bus data and/or data stored in a memory and for output of at least one control signal, a logic unit, which is adapted in order to modify a quantity of received first local bus data based on the control signal in order to generate the second local bus data to be transmitted, wherein the logic unit is further adapted for synchronous, delayed transmitting of the second local bus data via the output interface.

Abstract: A device for coupling a fieldbus to a local bus for connection to at least one data bus subscriber, the device comprising a first unit that is connectable to the fieldbus and is adapted for sending and receiving data via the fieldbus; a second unit that is connectable to the local bus and is adapted for sending and receiving data via the local bus in at least one data packet; a data management unit that is connected to the first unit and the second unit, wherein the data management unit is adapted for transferring first symbols from data received via said first unit to said second unit in a sequence-dependent manner; and wherein the second unit is adapted to send at least one data packet including the first symbols on the local bus. In addition, a corresponding method for transferring data is described.

Abstract: A device for coupling a fieldbus to a local bus for connection to at least one data bus subscriber, the device comprising a first unit that is connectable to the fieldbus and is adapted for sending and receiving data via the fieldbus; a second unit that is connectable to the local bus and is adapted for sending and receiving data via the local bus in at least one data packet; a data management unit that is connected to the first unit and the second unit, wherein the data management unit is adapted for transferring first symbols from data received via said first unit to said second unit in a sequence-dependent manner; and wherein the second unit is adapted to send at least one data packet including the first symbols on the local bus. In addition, a corresponding method for transferring data is described.

Abstract: A data bus subscriber and a method for processing data, wherein the data bus subscriber can be connected to a local bus, particularly a ring bus, and the data bus subscriber has an input interface, which can be connected to the local bus, for receiving first local bus data, an output interface, which can be connected to the local bus, for transmitting second local bus data, a processing component for synchronous processing of the first local bus data and/or data stored in a memory and for output of at least one control signal, a logic unit, which is adapted in order to modify a quantity of received first local bus data based on the control signal in order to generate the second local bus data to be transmitted, wherein the logic unit is further adapted for synchronous, delayed transmitting of the second local bus data via the output interface.

Abstract: An apparatus with a data input, a data output, a first buffer, a second buffer, and control logic is disclosed. The control logic is equipped to route data packets that are received through the data input to the first buffer or the second buffer and to flag them as valid or invalid, and to provide data packets that are to be output through the data output from the first buffer or the second buffer, equipped to provide a data packet that is to be output through the data output from the first buffer when the data packet is being written into the first buffer at the time of a start of the readout, to provide it from the second buffer when the data packet is being written into the second buffer at the time of a start of the readout.

Abstract: A device for coupling a fieldbus to a local bus for connection to at least one data bus subscriber, the device comprising a first unit that is connectable to the fieldbus and is adapted for sending and receiving data via the fieldbus; a second unit that is connectable to the local bus and is adapted for sending and receiving data via the local bus in at least one data packet; a data management unit that is connected to the first unit and the second unit, wherein the data management unit is adapted for transferring first symbols from data received via said first unit to said second unit in a sequence-dependent manner; and wherein the second unit is adapted to send at least one data packet including the first symbols on the local bus. In addition, a corresponding method for transferring data is described.

Abstract: The subject of the invention is a system (1), having a master (900), a first slave (100), a second slave (200), and a bus (40), wherein the master (900) and the first slave (100) and the second slave (200) are connected to one another by the bus (40) in order to transmit a data packet (4) from the master (900) via the first slave (100) and back to the master (900) via the second slave (200), in which the master (900) is configured to generate the data packet (4) with a header (4.1) and a data unit (4.2) and to send the generated data packet (4) on the bus (40), in which the first slave (100) is configured to write its first address (A1) and first payload data (D1) into a first segment (10) of the data unit (4.2) of the data packet (4), in which the second slave (200) is configured to write its second address (A2) and second payload data (D2) into a second segment (20) of the data unit (4.

Abstract: A circuit with a first buffer, a second buffer, a third buffer, a fourth buffer, a first data input for first data, a second data input for second data, a data output, and control logic is disclosed. The control logic connects the first data input to one of the buffers, connects the second data input to one of the buffers, and connects the data output to one of the buffers, swap the buffer currently connected to the first data input for a non-connected buffer when first data have been validly written through the first data input into the buffer currently connected to the first data input, swap the buffer currently connected to the second data input for the non-connected buffer when second data have been validly written through the second data input into the buffer currently connected to the second data input.

Abstract: A master of a bus system for process control with one slave and a bus. A transceiver circuit transmits and receives for process control by data packets. A channel has a receive memory area. The transceiver circuit is set up to write the receive data of a data packet received via the bus into the receive memory area. The channel has at least one selection circuit, an output of the selection circuit being connected to the transceiver circuit. The selection circuit has a first input for selecting initial data. The selection circuit has a second input, the second input being connected to the receive memory area, and the selection circuit is configured to select the transmit data from the initial data and/or the data written into the receive memory area and to output the transmitted data to the transceiver circuit for a data packet to be transmitted.

Abstract: A method and a data bus subscriber are described for processing process data in a local bus, in particular a ring bus, the method including receiving a first symbol during a first number of working cycles, with the first symbol comprising first process data; loading at least one first instruction from an instruction list during the first number of working cycles, receiving a second symbol during a second number of working cycles, with the second symbol comprising second process data, processing the first process data contained in the first symbol with the at least one loaded first instruction during the second number of working cycles, and loading at least one second instruction for processing the second process data of the second symbol during the second number of working cycles.

Abstract: A method and a device for generating a data packet to be transmitted comprising data and at least one value for a cyclic redundancy check (CRC) value, are described, wherein the CRC value is generated using at least one previously determined polynomial on the basis of at least some of the data and the method comprises initializing a counter value, counting units of data, wherein the counter value changes for each unit of data, and adding a CRC value into the data packet, when the counter value reaches a reference value or all units of data in the data packet have already been counted, wherein the CRC value is generated over the units of data which have been counted since the counter value last reached the reference value or since the counter value was initialized. Furthermore, a method and a device for checking a corresponding received data packet are described.

Abstract: An apparatus with a data input, a data output, a first buffer, a second buffer, and control logic is disclosed. The control logic is equipped to route data packets that are received through the data input to the first buffer or the second buffer and to flag them as valid or invalid, and to provide data packets that are to be output through the data output from the first buffer or the second buffer, equipped to provide a data packet that is to be output through the data output from the first buffer when the data packet is being written into the first buffer at the time of a start of the readout, to provide it from the second buffer when the data packet is being written into the second buffer at the time of a start of the readout.

Abstract: A circuit with a first buffer, a second buffer, a third buffer, a fourth buffer, a first data input for first data, a second data input for second data, a data output, and control logic is disclosed. The control logic connects the first data input to one of the buffers, connects the second data input to one of the buffers, and connects the data output to one of the buffers, swap the buffer currently connected to the first data input for a non-connected buffer when first data have been validly written through the first data input into the buffer currently connected to the first data input, swap the buffer currently connected to the second data input for the non-connected buffer when second data have been validly written through the second data input into the buffer currently connected to the second data input.

Abstract: A coupler for an automation system for controlling a process having a network interface for connection to an Ethernet-based network for receiving an Ethernet telegram having process data of the process and having control data. A local bus interface connects to a local bus for transmitting a local bus telegram. A circuit is formed between the network interface and the local bus interface. The circuit includes an arithmetic circuit for retrieving the process data from a payload data area of the Ethernet telegram. The circuit includes a first data filter circuit, which differs from the arithmetic circuit, for filtering out a predetermined subset of the control data from a header of the Ethernet telegram preceding the payload data area. The circuit is configured to generate the local bus telegram and to insert the process data and the predetermined subset of the control data into the local bus telegram.

Abstract: Provided is a system having a master, a first slave, a second slave, and a bus. The master, the first slave and the second slave are connected to one another by the bus in order to transmit a data packet from the master via the first slave and back to the master via the second slave. The master is configured to generate the data packet with a header and a data unit and to send the generated data packet on the bus, in which the first slave is configured to write its first address and first payload data into a first segment of the data unit of the data packet. The second slave is configured to write its second address and second payload data into a second segment of the data unit of the data packet.

Abstract: A coupler for an automation system for controlling a process, having a first interface for connection to a field bus for receiving a field bus message with process data of the process, a second interface for connection to a local bus for transmitting a local bus message, and a circuit implemented between the first interface and the second interface. The circuit has a non-clocked logic circuit comprising a number of hardware logic elements. The non-clocked logic circuit is equipped to change process data received through the first interface. The circuit is equipped to output the changed process data in the local bus message.

Abstract: A circuit for coupling a field bus and a local bus. A field bus controller is equipped to send and receive process data over the field bus. A local bus controller is equipped to send and receive the process data over the local bus. A data management unit is connected to the field bus controller and the local bus controller. The data management unit is equipped to transfer the process data between field bus controller and local bus controller. A memory area connected to the data management unit for copying and storing the process data. A processor connected to the data management unit and connected to the memory area. The processor is equipped to set up the data management unit to copy the process data into the memory area and the processor is equipped to read out the process data copied in the memory area.

Abstract: A master of a bus system for process control with one slave and a bus. A transceiver circuit transmits and receives for process control by data packets. A channel has a receive memory area. The transceiver circuit is set up to write the receive data of a data packet received via the bus into the receive memory area. The channel has at least one selection circuit, an output of the selection circuit being connected to the transceiver circuit. The selection circuit has a first input for selecting initial data. The selection circuit has a second input, the second input being connected to the receive memory area, and the selection circuit is configured to select the transmit data from the initial data and/or the data written into the receive memory area and to output the transmitted data to the transceiver circuit for a data packet to be transmitted.

Abstract: A method and a device for generating a data packet to be transmitted comprising data and at least one value for a cyclic redundancy check (CRC) value, are described, wherein the CRC value is generated using at least one previously determined polynomial on the basis of at least some of the data and the method comprises initializing a counter value, counting units of data, wherein the counter value changes for each unit of data, and adding a CRC value into the data packet, when the counter value reaches a reference value or all units of data in the data packet have already been counted, wherein the CRC value is generated over the units of data which have been counted since the counter value last reached the reference value or since the counter value was initialized. Furthermore, a method and a device for checking a corresponding received data packet are described.

Abstract: A data bus subscriber and a method for processing data, wherein the data bus subscriber can be connected to a local bus, particularly a ring bus, and the data bus subscriber has an input interface, which can be connected to the local bus, for receiving first local bus data, an output interface, which can be connected to the local bus, for transmitting second local bus data, a processing component for synchronous processing of the first local bus data and/or data stored in a memory and for output of at least one control signal, a logic unit, which is adapted in order to modify a quantity of received first local bus data based on the control signal in order to generate the second local bus data to be transmitted, wherein the logic unit is further adapted for synchronous, delayed transmitting of the second local bus data via the output interface.