Abstract: A switch device for switching an analog electrical input signal includes: a switching transistor being a flipped-well-silicon-on-insulator-NMOS transistor; and a bootstrapping arrangement including a voltage providing arrangement for providing a floating voltage during the on-state, wherein the floating voltage is provided at a positive terminal and at a negative terminal of the voltage providing arrangement; wherein the bootstrapping arrangement is configured in such way that during the on-state the positive terminal is electrically connected to the front gate contact of the switching transistor and to the back gate contact of the switching transistor, and the negative terminal is electrically connected to the source contact of the switching transistor; wherein the bootstrapping arrangement is configured in such way that during the off-state the positive terminal and the negative terminal are not electrically connected to the switching transistor.

Abstract: The invention refers to an apparatus for driving a load with a drive signal. The apparatus includes an AC voltage source, a DC voltage source, a capacitor and a control apparatus. The AC voltage source outputs an AC voltage. The DC voltage source outputs a DC voltage. The capacitor includes a first terminal and a second terminal. The AC voltage source is connected to the first terminal, and a signal output is connected to the second output. The control apparatus controls, depending on a voltage present at the signal output, a connection between the DC voltage source and the second terminal. Furthermore, the invention refers to a corresponding method as well as to a device.

Abstract: A switch device for switching an analog electrical input signal includes: a switching transistor being a flipped-well-silicon-on-insulator-NMOS transistor; and a bootstrapping arrangement including a voltage providing arrangement for providing a floating voltage during the on-state, wherein the floating voltage is provided at a positive terminal and at a negative terminal of the voltage providing arrangement; wherein the bootstrapping arrangement is configured in such way that during the on-state the positive terminal is electrically connected to the front gate contact of the switching transistor and to the back gate contact of the switching transistor, and the negative terminal is electrically connected to the source contact of the switching transistor; wherein the bootstrapping arrangement is configured in such way that during the off-state the positive terminal and the negative terminal are not electrically connected to the switching transistor.

Abstract: The invention refers to an apparatus for driving a load with a drive signal. The apparatus includes an AC voltage source, a DC voltage source, a capacitor and a control apparatus. The AC voltage source outputs an AC voltage. The DC voltage source outputs a DC voltage. The capacitor includes a first terminal and a second terminal. The AC voltage source is connected to the first terminal, and a signal output is connected to the second output. The control apparatus controls, depending on a voltage present at the signal output, a connection between the DC voltage source and the second terminal. Furthermore, the invention refers to a corresponding method as well as to a device.

Abstract: An electronic device includes a circuit for measuring a current in an inductor, wherein the current in the inductor is controlled by alternately switching a first power transistor and a second power transistor each having a first electrode, a second electrode and a control gate. The measuring circuit includes a first sense transistor having a first electrode, a second electrode and a control gate, the first sense transistor having the control gate coupled to the control gate of the first power transistor. A second electrode is coupled to the second electrode of the first power transistor. A second sense transistor has a first electrode, a second electrode and a control gate, the second sense transistor having the control gate coupled to the control gate of the second power transistor and having the second electrode coupled to the second electrode of the second power transistor.

Abstract: An electronic device includes a circuit for measuring a current in an inductor, wherein the current in the inductor is controlled by alternately switching a first power transistor and a second power transistor each having a first electrode, a second electrode and a control gate. The measuring circuit includes a first sense transistor having a first electrode, a second electrode and a control gate, the first sense transistor having the control gate coupled to the control gate of the first power transistor. A second electrode is coupled to the second electrode of the first power transistor. A second sense transistor has a first electrode, a second electrode and a control gate, the second sense transistor having the control gate coupled to the control gate of the second power transistor and having the second electrode coupled to the second electrode of the second power transistor.

Abstract: A digital controlled oscillator including a programmable current source, a first variable capacitor and a second variable capacitor. A comparator compares the voltage across the variable capacitors with a reference voltage level and generates a DCO output clock signal. A switching means alternately switches the variable capacitors to either charge from a programmable current source or discharge in response to an output signal of the comparator. A clock divider divides the DCO output clock signal by a factor N substantially greater than 1. A frequency monitor receives the divided clock signal, determines the time difference of successive clock periods of the divided clock signal and generates a feedback signal to adapt the frequency of the DCO output clock signal.

Abstract: A digital controlled oscillator including a programmable current source, a first variable capacitor and a second variable capacitor. A comparator compares the voltage across the variable capacitors with a reference voltage level and generates a DCO output clock signal. A switching means alternately switches the variable capacitors to either charge from a programmable current source or discharge in response to an output signal of the comparator. A clock divider divides the DCO output clock signal by a factor N substantially greater than 1. A frequency monitor receives the divided clock signal, determines the time difference of successive clock periods of the divided clock signal and generates a feedback signal to adapt the frequency of the DCO output clock signal.

Abstract: The present invention relates to a ring oscillator including a delay stage, the delay stage includes a differential pair of input transistor, a variable resistive load coupled to the transistor, a differential output between the variable resistive load and the corresponding input transistor, a variable current source coupled to the differential pair of transistors for variably setting a bias current through the differential pair of transistors, and an input coupled to the variable resistive load and the variable current source for receiving an configuration signal, wherein the variable resistive load and the variable current source are changed in response to the configuration signal, wherein the bias current of the variable current source increases and the variable resistive load decreases, and vice versa.

Abstract: A charge pump for generating an input voltage for an operational amplifier includes a storage capacitor for storing a charge pump voltage and a flying capacitor configured to be charged during a first phase of operation and discharged during a second phase of operation. Discharging the flying capacitor charges the storage capacitor. A current source supplies the flying capacitor and a switching means switches current from the current source through the flying capacitor in a first direction during the first phase and in a second opposite direction during the second phase.

Abstract: An all-digital phase locked loop system for generating an oscillator output signal under control of a digital reference input. The system comprises a digitally controlled oscillator, a digital loop filter for generating a multiple bit digital control signal for the digitally controlled oscillator, a sigma-delta modulator for generating an additional 1-bit digital control signal for the digitally controlled oscillator, a digital divider dividing the oscillator output signal and providing a digital divided signal, and a digital adder with a first, additive input to which the digital reference input is applied and a second, subtractive input to which the digital divided signal is applied. The digital adder provides a digital output, the most significant bits of which are applied to an input of the digital loop filter and the least significant bits of which are applied to an input of the sigma-delta modulator. In the preferred embodiment, the sigma-delta modulator is of a two-stage MASH configuration.

Abstract: An all-digital phase locked loop system for generating an oscillator output signal under control of a digital reference input. The system comprises a digitally controlled oscillator, a digital loop filter for generating a multiple bit digital control signal for the digitally controlled oscillator, a sigma-delta modulator for generating an additional 1-bit digital control signal for the digitally controlled oscillator, a digital divider dividing the oscillator output signal and providing a digital divided signal, and a digital adder with a first, additive input to which the digital reference input is applied and a second, subtractive input to which the digital divided signal is applied. The digital adder provides a digital output, the most significant bits of which are applied to an input of the digital loop filter and the least significant bits of which are applied to an input of the sigma-delta modulator. In the preferred embodiment, the sigma-delta modulator is of a two-stage MASH configuration.

Abstract: Oscillator circuit with an LC resonant circuit 1, an activating component 2 connected to the LC resonant circuit 1, which serves to compensate for the losses occurring in the LC resonant circuit 1, where the series-configuration of both the LC resonant circuit 1 and the activating component 2 is connected by way of a current-defining element, which sets the current flowing between a first voltage VDD and a second voltage VSS, which is different from the first voltage VDD.

Abstract: Oscillator circuit with an LC resonant circuit 1, an activating component 2 connected to the LC resonant circuit 1, which serves to compensate for the losses occurring in the LC resonant circuit 1, where the series-configuration of both the LC resonant circuit 1 and the activating component 2 is connected by way of a current-defining element, which sets the current flowing through the activating component 2, between a first voltage VDD and a second voltage VSS, which is different from the first voltage VDD.

Abstract: In a circuit configuration for the compensation of leakage currents in a voltage-controlled oscillator (12) of a PLL circuit (10), a control voltage is applied to the oscillator by way of a loop filter (20), which is generated by a phase detector (16) as a function of the phase difference between the phase of a reference signal (fref) and the phase of the signal output by the voltage-controlled oscillator (12). This oscillator (12) contains varicap diodes (28, 30), as circuit elements to influence the frequency, to which the control voltage is applied via a control line (34). A compensation circuit (K) is provided with varicap diodes (36, 38) in the same configuration as those in the oscillator (12), and a voltage-follower-mode connected operational amplifier (40) with a differential output is provided which has an input (41) that is connected to the control line (34). It reproduces at one of its outputs (44) the control voltage which it applies to the varicap diodes (36, 38) in the compensation circuit (K).

Abstract: In a circuit configuration for the compensation of leakage currents in a voltage-controlled oscillator (12) of a PLL circuit (10), a control voltage is applied to the oscillator by way of a loop filter (20), which is generated by a phase detector (16) as a function of the phase difference between the phase of a reference signal (fref) and the phase of the signal output by the voltage-controlled oscillator (12). This oscillator (12) contains varicap diodes (28, 30), as circuit elements to influence the frequency, to which the control voltage is applied via a control line (34). A compensation circuit (K) is provided with varicap diodes (36, 38) in the same configuration as those in the oscillator (12), and a voltage-follower-mode connected operational amplifier (40) with a differential output is provided which has an input (41) that is connected to the control line (34). It reproduces at one of its outputs (44) the control voltage which it applies to the varicap diodes (36, 38) in the compensation circuit (K).

Abstract: A circuit assembly (10) for generating a phase-locked frequency-modulatable carrier frequency signal contains a voltage-controlled oscillator (50) generating the carrier frequency signal as a function of a control signal. It furthermore contains a phase detector (44) which compares a reference frequency signal to a signal derived from the carrier frequency signal in phase therewith to thus produce the control signal so that the difference in phase between the signal derived from the carrier frequency signal and the reference frequency signal is zero. A reference frequency generator (36) is provided whose output signal is applied as the reference frequency signal directly to the phase detector (44).

Abstract: Multi-channel transmission systems make great demands on the adjustment of the local oscillators in order to minimize carrier frequency variations on the transmission and reception sides. There are prior art processes and arrangements in which the local oscillators are adjusted by means of a synchronism word. The prior art processes and arrangements, however, have the drawback that the oscillators cannot be adjusted accurately enough. The present invention overcomes this drawback in that, in addition to the known synchronism symbols, other synchronism symbols are used and the synchronism symbols are evaluated with increased spectral resolution.