Abstract: A transistor circuit for an array device comprises a plurality of thin film transistors electrically connected in parallel and provided on a common substrate. The transistors are arranged on the substrate as at least two rows (20i, 2O2, 2O3) of transistors, and the source lines (30) of the transistors in the first and second rows have different widths and the drain lines (32) of the transistors in the first and second rows have different widths. All sources (30) are connected together and all drains (32) are connected together, and a source connection is provided to an end portion of the wider source lines and a drain connection is provided to an end portion of the wider drain lines. This provide a source and drain layout that reduces layout area and pitch of wide channel TFTs, whilst preventing degradation in the source and drain terminals/lines due to high current densities. The layout essentially comprises groups of small parallel TFTs, which are in turn connected in parallel.

Abstract: An inkjet print head comprises an array of print head heater circuits. Each circuit has a heater element (12) and a drive transistor (14) in series between power lines (20,22), and with a node (23) at the junction therebetween. A first capacitive element (50) is coupled between a first control signal (52) and the node (23) and a second capacitive element (54) is coupled between a second control signal (56), which is complementary to the first control signal (52), and the node (23). The two capacitive elements can be used to capacitively couple opposite step voltage changes into the circuit. These capacitive coupling effects can be used to alter the switching characteristics so as to reduce simultaneous high voltages on the gate and drain of the drive transistor.

Abstract: A method of manufacturing an electronic device including a thin film transistor comprises forming a semiconductor film over an insulating substrate; depositing a first masking layer over the semiconductor film and removing portions of it to form a plurality of holes through it that extend substantially perpendicularly from its upper to its lower surface; patterning the first masking layer in a first pattern; depositing a second masking layer over the first masking layer; patterning the second masking layer to define a second pattern that lies within the area of the first pattern; and implanting the semiconductor film using at least the first masking layer as an implantation mask.

Abstract: This invention relates to the fabrication of thin-film transistors (TFTs) on a substrate (4) such as a glass or insulating polymer substrate for use in an active-matrix liquid-crystal display or other large area electronic device. A method of forming a TFT is described which includes the deposition of a masking layer (8) over a semiconductor film (2) and the removal of portions of the masking layer (8) to form a plurality of holes therethrough of a predetermined size and distribution. The perforated portion (26,28) of the masking layer (8) serves to mask partially the semiconductor film (2) during a dopant implantation step to form a field relief region (20,22) simultaneously with definition of the source and drain regions (16,18).