Patents by Inventor Franklin Mark Schellenberg
Franklin Mark Schellenberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150042971Abstract: A method of performing nanolithography is disclosed, comprising use of an optical printing head that enables a super-resolution lithographic exposures compatible with conventional optical lithographic processes. The super-resolution exposures are carried out using light directed onto a data recording medium using plasmonic structures, and in particular using plasmonic structures using specially designed super-resolution apertures, of which the “bow-tie” and “C-aperture” are examples. These specially designed apertures create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to a data recording medium. A data processing system is provided to re-interpret the data to be patterned into a set of modulation signals used to drive the multiple individual channels and the multiple exposures.Type: ApplicationFiled: September 22, 2014Publication date: February 12, 2015Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 8841637Abstract: A method of performing nanolithography is disclosed, comprising use of an optical printing head that enables a super-resolution lithographic exposures compatible with conventional optical lithographic processes. The super-resolution exposures are carried out using light transmitted through specially designed super-resolution apertures, of which the “bow-tie” and “C-aperture” are examples. These specially designed apertures create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the object to be exposed. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the multiple individual channels and the multiple exposures.Type: GrantFiled: August 12, 2013Date of Patent: September 23, 2014Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Publication number: 20140116982Abstract: A method for fabricating waveguides comprising nano-apertures for illumination of sub-resolution exposures is presented. In particular, the end of a waveguide, such as an optical fiber, is coated with a material, such as an electrically conducting metal or a semiconductor. This material is then selectively removed through a lithography process using photon exposure to create an aperture in the material at the end of the waveguide. Under normal conditions, if the aperture is smaller than the wavelength of light in the waveguide, there is little or no transmission through the aperture. However, with the appropriate selection of materials and aperture geometry, for example a metallic conducting coating and sub-wavelength “C-shaped” or “bow-tie” aperture, enhancement of the transmission of light through the aperture can be achieved, allowing effective illumination of sub-resolution spots using the nano-aperture. This can be used in a nanolithography system incorporating waveguide illuminators as well.Type: ApplicationFiled: July 9, 2013Publication date: May 1, 2014Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 8710463Abstract: A method for fabricating waveguides comprising nano-apertures for illumination of sub-resolution exposures is presented. In particular, the end of a waveguide, such as an optical fiber, is coated with a material, such as an electrically conducting metal or a semiconductor. This material is then selectively removed through a lithography process using photon exposure to create an aperture in the material at the end of the waveguide. Under normal conditions, if the aperture is smaller than the wavelength of light in the waveguide, there is little or no transmission through the aperture. However, with the appropriate selection of materials and aperture geometry, for example a metallic conducting coating and sub-wavelength “C-shaped” or “bow-tie” aperture, enhancement of the transmission of light through the aperture can be achieved, allowing effective illumination of sub-resolution spots using the nano-aperture. This can be used in a nanolithography system incorporating waveguide illuminators as well.Type: GrantFiled: July 9, 2013Date of Patent: April 29, 2014Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Publication number: 20140055769Abstract: A method of performing nanolithography is disclosed, comprising use of an optical printing head that enables a super-resolution lithographic exposures compatible with conventional optical lithographic processes. The super-resolution exposures are carried out using light transmitted through specially designed super-resolution apertures, of which the “bow-tie” and “C-aperture” are examples. These specially designed apertures create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the object to be exposed. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the multiple individual channels and the multiple exposures.Type: ApplicationFiled: August 12, 2013Publication date: February 27, 2014Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 8507881Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: GrantFiled: June 24, 2011Date of Patent: August 13, 2013Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 8507880Abstract: A method for fabricating waveguides comprising nano-apertures for illumination of sub-resolution exposures is presented. In particular, the end of a waveguide, such as an optical fiber, is coated with a material, such as an electrically conducting metal or a semiconductor. This material is then selectively removed through the process of ion milling, creating an aperture in the material at the end of the waveguide. Under normal conditions, if the aperture is smaller than the wavelength of light in the waveguide, there is little or no transmission through the aperture. However, with the appropriate selection of materials and aperture geometry, for example a metallic conducting coating and sub-wavelength “C-shaped” or “bow-tie” aperture, enhancement of transmission of light through the aperture can be achieved, allowing effective illumination of sub-resolution spots using the ion-milled aperture. This can be used in a nanolithography system incorporating waveguide illuminators as well.Type: GrantFiled: June 4, 2012Date of Patent: August 13, 2013Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Publication number: 20120312774Abstract: A method for fabricating waveguides comprising nano-apertures for illumination of sub-resolution exposures is presented. In particular, the end of a waveguide, such as an optical fiber, is coated with a material, such as an electrically conducting metal or a semiconductor. This material is then selectively removed through the process of ion milling, creating an aperture in the material at the end of the waveguide. Under normal conditions, if the aperture is smaller than the wavelength of light in the waveguide, there is little or no transmission through the aperture. However, with the appropriate selection of materials and aperture geometry, for example a metallic conducting coating and sub-wavelength “C-shaped” or “bow-tie” aperture, enhancement of transmission of light through the aperture can be achieved, allowing effective illumination of sub-resolution spots using the ion-milled aperture. This can be used in a nanolithography system incorporating waveguide illuminators as well.Type: ApplicationFiled: June 4, 2012Publication date: December 13, 2012Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Publication number: 20120257183Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: ApplicationFiled: June 24, 2011Publication date: October 11, 2012Inventors: Franklin Mark Schellenberg, Keith Edward Benneth
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Patent number: 8193519Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: GrantFiled: September 5, 2009Date of Patent: June 5, 2012Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 7989783Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: GrantFiled: September 5, 2009Date of Patent: August 2, 2011Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Publication number: 20100073657Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: ApplicationFiled: September 5, 2009Publication date: March 25, 2010Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Publication number: 20100075259Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: ApplicationFiled: September 5, 2009Publication date: March 25, 2010Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 7586583Abstract: A nanolithography system comprising a novel optical printing head suitable for high throughput nanolithography. This optical head enables a super-resolution lithographic exposure tool that is otherwise compatible with the optical lithographic process infrastructure. The exposing light is transmitted through specially designed super-resolution apertures, of which the “C-aperture” is one example, that create small but bright images in the near-field transmission pattern. A printing head comprising an array of these apertures is held in close proximity to the wafer to be exposed. In one embodiment, an illumination source is divided into parallel channels that illuminate each of the apertures. Each of these channels can be individually modulated to provide the appropriate exposure for the particular location on the wafer corresponding to the current position of the aperture. A data processing system is provided to re-interpret the layout data into a modulation pattern used to drive the individual channels.Type: GrantFiled: September 15, 2006Date of Patent: September 8, 2009Inventors: Franklin Mark Schellenberg, Keith Edward Bennett
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Patent number: 7172838Abstract: Computer-based design and verification tools provide integrated circuit layouts for use in chromeless phase lithography. A phase-mask design tool assigns feature size descriptors to circuit layout features, and mask features are configured using the feature size descriptors. Feature size descriptors can be assigned based on feature size ranges established based on a mask error function, feature dimensions with respect to a lithographic system resolution limit, or selected properties of aerial image intensity as a function of feature size. Circuit layout features are assigned mask features that include twin phase steps. In addition, circuit layout features associated with selected feature descriptors are assigned sub-resolution assist mask pattern portions or other mask pattern portions based on optical and process corrections.Type: GrantFiled: September 27, 2002Date of Patent: February 6, 2007Inventors: Wilhelm Maurer, Juan Andres Torres Robles, Franklin Mark Schellenberg
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Publication number: 20040063000Abstract: Computer-based design and verification tools provide integrated circuit layouts for use in chromeless phase lithography. A phase-mask design tool assigns feature size descriptors to circuit layout features, and mask features are configured using the feature size descriptors. Feature size descriptors can be assigned based on feature size ranges established based on a mask error function, feature dimensions with respect to a lithographic system resolution limit, or selected properties of aerial image intensity as a function of feature size. Circuit layout features are assigned mask features that include twin phase steps. In addition, circuit layout features associated with selected feature descriptors are assigned sub-resolution assist mask pattern portions or other mask pattern portions based on optical and process corrections.Type: ApplicationFiled: September 27, 2002Publication date: April 1, 2004Applicant: Mentor Graphics CorporationInventors: Wilhelm Maurer, Juan Andres Torres Robles, Franklin Mark Schellenberg
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Patent number: 6643616Abstract: Methods and apparatuses for structure prediction based on model curvature are described. A simulation result corresponding to an integrated circuit or other structure is generated. The result includes contour data representing a feature value, for example, height (or intensity) of the structure at various points. Three or more points are used to determine a curvature of the result at a predetermined location. The curvature information can be used to determine boundaries of the structure. For example, when used with an integrated circuit layout, the curvature can be used for optical and process correction (OPC) purposes to modify an integrated circuit layout such that the resulting integrated circuit more closely resembles the designed integrated circuit than would otherwise be possible. In one embodiment, both slope and curvature of the integrated circuit structure are used for OPC purposes.Type: GrantFiled: December 7, 1999Date of Patent: November 4, 2003Inventors: Yuri Granik, Nicolas Bailey Cobb, Franklin Mark Schellenberg
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Patent number: 6159641Abstract: The present invention relates to a method for the repair of defects in the nonprinting region of a phase-shifting optical lithography mask by depositing an opaque material on the defect from a gaseous precursor by beam-induced deposition.Type: GrantFiled: December 16, 1993Date of Patent: December 12, 2000Assignee: International Business Machines CorporationInventors: Thomas Hall Baum, Paul Brian Comita, Franklin Mark Schellenberg
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Patent number: 5126292Abstract: A ceramic material for electronic circuit devices is sintered at less than r equal to 1000.degree. C. temperature. A filler material such as quartz and a glassy binder RO-Al.sub.2 O.sub.3 -B.sub.2 O.sub.3 are mixed together along with an appropriate glassy binder prior to firing. RO is drawn from the group of metal oxides MgO, CaO, SrO, BaO, ZnO or CdO and the glassy binders form no more than 40 vol % of the ceramic material. The glassy binder has a suitable viscosity and other properties so that after it is mixed with the quartz filler, sintering occurs at the relatively low temperature. As a consequence, high conductivity conductors made of copper, silver and gold can be appropriately metallized prior to firing. The strength and low dielectric constant of the ceramic material make the material well adapted for ceramic substrates, thick films and the like which are used in VHSIC and VLSI applications.Type: GrantFiled: November 8, 1989Date of Patent: June 30, 1992Assignee: The United States of America as represented by the Secretary of the NavyInventor: Douglas M. Mattox