Abstract: A low pin count, moderate speed serial data bus that has a variable width for the transfer of data between devices of a computer system. The serial data bus can be selectively configured to be 1-bit, 4-bit, 8-bit or 16-bit wide. Data (including bus commands and addresses) carried by wider parallel buses are serialized into data blocks, which are then transferred by the serial data bus at a high speed. One feature of the present invention is that the pin count requirement for the present invention is low: only four control pins are required for controlling the data transfer mechanisms of the data bus. Another significant feature of the present invention is that the host and companion interfaces of the serial data bus can have non-matching widths. To allow for host and companion interfaces with non-matching widths, an initialization protocol is used to establish the effective width of the data bus at power-on reset.

Abstract: A point-to-point or ring connectable bus bridge replicates a PCI bus serially over a point-to-point or ring connected network and the Fiber Channel interface enhanced by a method for improving link performance provides the serial connection. Participants can appear as resources or masters on the PCI bus and connections can be made to existing bus controllers and existing bus peripherals without redesign.