Abstract: Representative implementations of devices and techniques provide conservation of charge in a pixel. Charge in the pixel may be alternately stored in a first gate capacitance of the pixel and a second gate capacitance of the pixel. Transferring the charge between the gate capacitances conserves some or all of the charge, and reduces input power used to charge the gate capacitances.

Abstract: Representative implementations of devices and techniques provide conservation of charge in a pixel. Charge in the pixel may be alternately stored in a first gate capacitance of the pixel and a second gate capacitance of the pixel. Transferring the charge between the gate capacitances conserves some or all of the charge, and reduces input power used to charge the gate capacitances.

Abstract: Representative implementations of devices and techniques provide conservation of charge in a pixel. Charge in the pixel may be alternately stored in a first gate capacitance of the pixel and a second gate capacitance of the pixel. Transferring the charge between the gate capacitances conserves some or all of the charge, and reduces input power used to charge the gate capacitances.

Abstract: Representative implementations of devices and techniques provide selectivity for imaging devices and systems. Polarization may be applied to emitted light radiation and/or received light radiation to select a desired imaging result. Using polarization, an imaging device or system can pass desired light radiation having desired information and reject unwanted or stray light radiation.

Abstract: Representative implementations of devices and techniques provide selectivity for imaging devices and systems. Polarization may be applied to emitted light radiation and/or received light radiation to select a desired imaging result. Using polarization, an imaging device or system can pass desired light radiation having desired information and reject unwanted or stray light radiation.

Abstract: One embodiment of the present invention relates to an analog correlation unit comprising a plurality of parallel correlation components configured to operating according to an advanced switched-capacitor low pass filter principle that increases coding gain of the unit. Each correlation component comprises a sampling stage and a correlation stage. The sampling stage may comprise a switched capacitor configured to sample a received baseband signal to determine a value (e.g., polarity) of the baseband signal. The sampled baseband signal is provided to the correlation stages, which may respectively comprise a plurality of switched integrators configured to selectively receive and integrate the sampled baseband signal over time depending upon values (e.g., polarity) of the correlation code to generate voltage potential values. The analog correlation result is evaluated by a comparison of an adjustable threshold voltage with the difference between the output voltage potential values.

Abstract: One embodiment of the present invention relates to an analog correlation unit comprising a plurality of parallel correlation components configured to operating according to an advanced switched-capacitor low pass filter principle that increases coding gain of the unit. Each correlation component comprises a sampling stage and a correlation stage. The sampling stage may comprise a switched capacitor configured to sample a received baseband signal to determine a value (e.g., polarity) of the baseband signal. The sampled baseband signal is provided to the correlation stages, which may respectively comprise a plurality of switched integrators configured to selectively receive and integrate the sampled baseband signal over time depending upon values (e.g., polarity) of the correlation code to generate voltage potential values. The analog correlation result is evaluated by a comparison of an adjustable threshold voltage with the difference between the output voltage potential values.

Abstract: An oscillator arrangement having a resonator and a drive circuit which is connected to a connecting terminal of the oscillator is disclosed. In one embodiment, the oscillator includes a current source circuit is connected between a terminal for a first supply potential and the connecting terminal of the resonator and supplies the connecting terminal with a current source current which varies periodically at an oscillator frequency. A current sink circuit is connected between the connecting terminal of the resonator and a second supply potential, where the current sink circuit draws a current sink current from the connecting terminal, said current sink current varying periodically at the oscillator frequency and being negatively fed back to the current source current.

Abstract: The invention relates to a circuit arrangement for switching high-voltage signals with low-voltage signals, particularly for driving a semiconductor memory arrangement, comprising a low-voltage logic device for generating a low-voltage signal with a first predetermined logic level and with a second predetermined logic level, comprising a latch for receiving and latching the low-voltage signal and for outputting an output signal with a voltage dependent on the logic level of the received low-voltage signal, comprising a level shifter for increasing the value of the voltage of the latched low-voltage signal to a voltage of a high-voltage signal, as a result of which the voltage of the output signal output essentially rises to the voltage of the high-voltage signal, the latch exhibiting one or more high-voltage transistors.

Abstract: An oscillator arrangement having a resonator and a drive circuit which is connected to a connecting terminal of the oscillator is disclosed. In one embodiment, the oscillator includes a current source circuit is connected between a terminal for a first supply potential and the connecting terminal of the resonator and supplies the connecting terminal with a current source current which varies periodically at an oscillator frequency. A current sink circuit is connected between the connecting terminal of the resonator and a second supply potential, where the current sink circuit draws a current sink current from the connecting terminal, said current sink current varying periodically at the oscillator frequency and being negatively fed back to the current source current.