Abstract: A shading textile is characterized in that it comprises a plurality of strip-shaped photovoltaic lamellas which, aligned next to one another or spaced apart from one another in their longitudinal direction, form a continuous product by means of a yarn system, wherein the yarn system is designed to be elastic in at least one direction, so that by tensioning the shading textile, a spacing between adjacent photovoltaic elements can be varied perpendicular to the longitudinal direction.

Abstract: A shading textile is characterized in that it comprises a plurality of strip-shaped photovoltaic lamellas which, aligned next to one another or spaced apart from one another in their longitudinal direction, form a continuous product by means of a yarn system, wherein the yarn system is designed to be elastic in at least one direction, so that by tensioning the shading textile, a spacing between adjacent photovoltaic elements can be varied perpendicular to the longitudinal direction.

Abstract: A cooling system and method for cooling electronic components, including IC dies. The cooling system employs a cooling device that includes a composite structure having first and second plates arranged substantially in parallel and bonded together to define a sealed cavity therebetween. The first plate has a surface that defines an outer surface of the composite structure and is adapted for thermal contact with at least one electronic component. A mesh of interwoven strands is disposed within the cavity and lies in a plane substantially parallel to the first and second plates, with the strands bonded to the first and second plates. A fluid is contained and sealed within the cavity of the composite structure, and flows through interstices defined by and between the strands of the mesh.

Abstract: A gaming headset adapted for precise delivery of chemical substances capable of olfactory stimulation, such as odorants, fragrances, pheromones, etc. The headset includes at least one earpiece containing a speaker, a feature for securing the earpiece to the person's head while positioning the speaker over one of the person's ears when the headset is worn, an armature disposed relative to the earpiece so as to extend toward the person's mouth, a microphone located on the armature so as to be located in front of the person's mouth, and a feature supported by and extending along the armature for delivering at least one chemical substance to the person's nostril's when the headset is worn.

Abstract: Apparatus for cooling of an electrical circuit element on an electrical element package, comprising in combination, structure including a hollow body defining a cavity for containing cooling fluid located in heat transfer relation with said element, a rotatably tightenable connection between said package and said hollow body, and acting to block leakage of cooling fluid from said cavity.

Abstract: A heat spreader and method for thermal management of a computer memory module by promoting natural convection cooling of the memory module. The heat spreader includes a frame surrounding a planar body adapted to be mounted to a memory module of a computer, and a grid defined in the planar body by a plurality of uniformly distributed perforations. The perforations extend through the planar body to allow natural convention between an interior space beneath the planar body and an exterior space above the planar body.

Abstract: A memory module having at least one random access memory device and a memory bus on a substrate. The memory module further comprises an SRAM cache interfaced with the random access memory device through an ASIC associated with the SRAM cache and operable as a prefetch controller for the SRAM cache. The ASIC and SRAM cache cooperate to enable data to be prefetched and cached during idle cycles of the memory device, thereby increasing the overall operating speed of the memory circuit by minimizing latencies should the prefetched data be requested. The ASIC can be programmed to prefetch not only data from the originally accessed row during a read operation, but also to speculatively prefetch data from logically coherent rows in order to anticipate and counteract a page miss and the associated latencies based on the locality of data.

Abstract: A mass storage device having at least one flash memory device and DRAM or SRAM-based cache within a package, and which comprises co-processor means within the package for performing compression and decompression of cached data before writing the cached data to the flash memory device.

Abstract: A memory module adapted for installation in an open memory socket on a mainboard of a computer. The memory module includes a substrate with an edge connector comprising pins along an edge of the substrate, and at least one memory package mounted to the substrate and containing a memory die electrically connected to input/output leads located along the perimeter of the memory package and through which data signals are transmitted to and from the memory die. Data signal lines electrically connect a plurality of the input/output leads of the memory package to a plurality of the pins of the edge connector. Termination resistors individually electrically connect each of the data signal lines to ground, a supply voltage, or a reference voltage of the memory package so as to reduce noise and signal reflections through the data signal lines.

Abstract: The present invention provides a method of increasing DDR memory bandwidth in DDR SDRAM modules. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued one CAS latency before the termination of an ongoing data burst By using the Variable Early Read command the effect of the CAS latency is minimized in terms of the effect on bandwidth. The enhanced bandwidth technology achieved with this invention optimizes the remaining two access latencies (tRP and tRCD) for optimal bandwidth. These optimizations in the SPD allow for much better bandwidth in real world applications.

Abstract: A method and architecture that overcomes the problem of latency-caused performance degradation of electronic memory systems. The method involves a “Posted Precharge,” by which an external command for Precharge is given as early as possible, such as immediately following a Read command. The execution of the Precharge is delayed by a precharge counter until all Read/Write commands are completed. By posting a precharge command on a bus at the first available opportunity, multiple pages can be open on the same bank of a memory device. As a result, access latencies are significantly reduced and efficiency of bus in electronic memory systems is significantly improved.