Abstract: A device comprises a data terminal, a clock terminal and a digital circuitry. The data terminal is configured to be connected to a serial data line. The clock terminal is configured to be connected to a serial clock line for receiving a clock signal. The digital circuitry is coupled to the data terminal and to the clock terminal. The digital circuitry is configured to operate using a time base signal provided via a further clock terminal to the device or using an internal clock signal that is generated by an internal oscillator of the device. Furthermore, a method for operating a device is described.

Abstract: A device comprises a data terminal, a clock terminal and a digital circuitry. The data terminal is configured to be connected to a serial data line. The clock terminal is configured to be connected to a serial clock line for receiving a clock signal. The digital circuitry is coupled to the data terminal and to the clock terminal. The digital circuitry is configured to operate using a time base signal provided via a further clock terminal to the device or using an internal clock signal that is generated by an internal oscillator of the device. Furthermore, a method for operating a device is described.

Abstract: A modulation arrangement comprises an input (E) for supplying a data signal (DS), a pre-modulator (VMod) that is coupled to the input (E) and features a clock pulse input (TEV) for supplying a pre-clock pulse (VT), a main modulator (HMod) that is coupled to the pre-modulator (VMod) on the input side and comprises a clock pulse input (TEH) for supplying a main clock pulse (HT), as well as an output for providing a modulated control signal (ST), and a switchable current source (Q, S) for providing a current (IS) that is controlled by the modulated control signal (ST) at an output (A) of the modulation arrangement. Furthermore, a method for providing a modulated control signal is disclosed.

Abstract: A modulation arrangement comprises an input (E) for supplying a data signal (DS), a pre-modulator (VMod) that is coupled to the input (E) and features a clock pulse input (TEV) for supplying a pre-clock pulse (VT), a main modulator (HMod) that is coupled to the pre-modulator (VMod) on the input side and comprises a clock pulse input (TEH) for supplying a main clock pulse (HT), as well as an output for providing a modulated control signal (ST), and a switchable current source (Q, S) for providing a current (IS) that is controlled by the modulated control signal (ST) at an output (A) of the modulation arrangement. Furthermore, a method for providing a modulated control signal is disclosed.