Patents by Inventor Franz Stueckler
Franz Stueckler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220254934Abstract: An electronic circuit is disclosed. The electronic circuit includes: a first transistor device integrated in an inner region of a first semiconductor body; a level shifter integrated in a level shifter region of the first semiconductor body, the level shifter region located in an edge region surrounding the inner region of the semiconductor body; and a drive circuit integrated in a drive circuit region in the edge region of the first semiconductor body, the drive circuit configured to receive a first input signal from a first input and drive the first transistor device based on the first input the drive circuit region arranged closer to the inner region than the level shifter region.Type: ApplicationFiled: April 28, 2022Publication date: August 11, 2022Inventors: Richard Hensch, Franz Stueckler, Stefan Tegen, Rolf Weis
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Patent number: 11342467Abstract: An electronic circuit is disclosed. The electronic circuit includes: a first transistor device integrated in an inner region of a first semiconductor body; a level shifter integrated in a level shifter region of the first semiconductor body, the level shifter region located in an edge region surrounding the inner region of the semiconductor body; and a drive circuit integrated in a drive circuit region in the edge region of the first semiconductor body, the drive circuit configured to receive a first input signal from a first input and drive the first transistor device based on the first input signal, the drive circuit region arranged closer to the inner region than the level shifter region.Type: GrantFiled: October 20, 2021Date of Patent: May 24, 2022Assignee: Infineon Technologies Dresden GmbH & Co. KGInventors: Richard Hensch, Franz Stueckler, Stefan Tegen, Rolf Weis
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Publication number: 20220037536Abstract: An electronic circuit is disclosed. The electronic circuit includes: a first transistor device integrated in an inner region of a first semiconductor body; a level shifter integrated in a level shifter region of the first semiconductor body, the level shifter region located in an edge region surrounding the inner region of the semiconductor body; and a drive circuit integrated in a drive circuit region in the edge region of the first semiconductor body, the drive circuit configured to receive a first input signal from a first input and drive the first transistor device based on the first input signal, the drive circuit region arranged closer to the inner region than the level shifter region.Type: ApplicationFiled: October 20, 2021Publication date: February 3, 2022Inventors: Richard Hensch, Franz Stueckler, Stefan Tegen, Rolf Weis
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Patent number: 11183598Abstract: An electronic circuit is disclosed. The electronic circuit includes: a first transistor device integrated in an inner region of a first semiconductor body; and a first drive circuit integrated in a first drive circuit region of the semiconductor body. The first drive circuit is configured to be connected to a level shifter and to drive a second transistor device. The first drive circuit region is located in an edge region surrounding the inner region of the semiconductor body.Type: GrantFiled: August 5, 2019Date of Patent: November 23, 2021Assignee: Infineon Technologies Dresden GmbH & Co. KGInventors: Richard Hensch, Franz Stueckler, Stefan Tegen, Rolf Weis
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Publication number: 20200044096Abstract: An electronic circuit is disclosed. The electronic circuit includes: a first transistor device integrated in an inner region of a first semiconductor body; and a first drive circuit integrated in a first drive circuit region of the semiconductor body. The first drive circuit is configured to be connected to a level shifter and to drive a second transistor device. The first drive circuit region is located in an edge region surrounding the inner region of the semiconductor body.Type: ApplicationFiled: August 5, 2019Publication date: February 6, 2020Inventors: Richard Hensch, Franz Stueckler, Stefan Tegen, Rolf Weis
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Patent number: 10373897Abstract: A device may include a carrier, a semiconductor chip arranged over a first surface of the carrier, and an encapsulation body comprising six side surfaces and encapsulating the semiconductor chip. A second surface of the carrier opposite to the first surface of the carrier is exposed from the encapsulation body. The device may further include electrical contact elements electrically coupled to the semiconductor chip and protruding out of the encapsulation body exclusively through two opposing side surfaces of the encapsulation body which have the smallest surface areas of all the side surfaces of the encapsulation body, and an electrically insulating layer arranged over the exposed second surface of the carrier.Type: GrantFiled: December 13, 2016Date of Patent: August 6, 2019Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Ralf Otremba, Felix Grawert, Amirul Afiq Hud, Uwe Kirchner, Teck Sim Lee, Guenther Lohmann, Hwee Yin Low, Edward Fuergut, Bernd Schmoelzer, Fabian Schnoy, Franz Stueckler
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Patent number: 9978671Abstract: A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.Type: GrantFiled: March 18, 2015Date of Patent: May 22, 2018Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Ralf Otremba, Fabio Brucchi, Teck Sim Lee, Xaver Schloegel, Franz Stueckler
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Patent number: 9972576Abstract: The semiconductor chip package comprises a semiconductor chip, and an encapsulation body encapsulating the semiconductor chip, wherein the encapsulation body comprises a semiconductor chip; an encapsulation body encapsulating the semiconductor chip, wherein the encapsulation body comprises two opposing main faces and side faces which connect the two main faces with each other, wherein the side face have a smaller surface area than the main faces, respectively, and wherein a marking is provided on at least one of the side faces.Type: GrantFiled: November 24, 2016Date of Patent: May 15, 2018Assignee: Infineon Technologies Austria AGInventors: Ralf Otremba, Teck Sim Lee, Amirul Afiq Hud, Fabian Schnoy, Felix Grawert, Uwe Kirchner, Bernd Schmoelzer, Franz Stueckler
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Patent number: 9812373Abstract: An electronic module includes a semiconductor package including a semiconductor chip and an electrically insulating encapsulation body encapsulating the semiconductor chip, the encapsulation body completely covering a second main face and four side faces of the semiconductor chip, wherein a first main face of the semiconductor chip that is opposite the first main face is exposed from the encapsulation body, a heat spreader attached to the semiconductor package, the heat spreader completely covering the first main face of the semiconductor chip, and an electrically insulating layer disposed on the heat spreader remote from the semiconductor package. The electrically insulating layer is completely separated from the semiconductor chip.Type: GrantFiled: December 7, 2015Date of Patent: November 7, 2017Assignee: Infineon Technologies AGInventors: Christian Fachmann, Ralf Otremba, Klaus Schiess, Franz Stueckler
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Publication number: 20170179009Abstract: A device may include a carrier, a semiconductor chip arranged over a first surface of the carrier, and an encapsulation body comprising six side surfaces and encapsulating the semiconductor chip. A second surface of the carrier opposite to the first surface of the carrier is exposed from the encapsulation body. The device may further include electrical contact elements electrically coupled to the semiconductor chip and protruding out of the encapsulation body exclusively through two opposing side surfaces of the encapsulation body which have the smallest surface areas of all the side surfaces of the encapsulation body, and an electrically insulating layer arranged over the exposed second surface of the carrier.Type: ApplicationFiled: December 13, 2016Publication date: June 22, 2017Inventors: Ralf Otremba, Felix Grawert, Amirul Afiq Hud, Uwe Kirchner, Teck Sim Lee, Guenther Lohmann, Hwee Yin Low, Edward Fuergut, Bernd Schmoelzer, Fabian Schnoy, Franz Stueckler
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Publication number: 20170148743Abstract: The semiconductor chip package comprises a semiconductor chip, and an encapsulation body encapsulating the semiconductor chip, wherein the encapsulation body comprises a semiconductor chip; an encapsulation body encapsulating the semiconductor chip, wherein the encapsulation body comprises two opposing main faces and side faces which connect the two main faces with each other, wherein the side face have a smaller surface area than the main faces, respectively, and wherein a marking is provided on at least one of the side faces.Type: ApplicationFiled: November 24, 2016Publication date: May 25, 2017Inventors: Ralf OTREMBA, Teck Sim LEE, Amirul Afiq HUD, Fabian SCHNOY, Felix GRAWERT, Uwe KIRCHNER, Bernd SCHMOELZER, Franz STUECKLER
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Publication number: 20160163616Abstract: An electronic module includes a semiconductor package, a heat spreader attached to the semiconductor package and an electrically insulating layer disposed on the heat spreader remote from the semiconductor package.Type: ApplicationFiled: December 7, 2015Publication date: June 9, 2016Inventors: Christian Fachmann, Ralf Otremba, Klaus Schiess, Franz Stueckler
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Patent number: 9263563Abstract: In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.Type: GrantFiled: October 31, 2013Date of Patent: February 16, 2016Assignee: Infineon Technologies Austria AGInventors: Ralf Otremba, Fabio Brucchi, Franz Stückler, Teck Sim Lee
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Publication number: 20150270208Abstract: A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.Type: ApplicationFiled: March 18, 2015Publication date: September 24, 2015Inventors: Ralf OTREMBA, Fabio BRUCCHI, Teck Sim LEE, Xaver SCHLOEGEL, Franz STUECKLER
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Publication number: 20150228607Abstract: In various embodiments, a layer stack is provided. The layer stack may include a carrier; a first metal disposed over the carrier; a second metal disposed over the first metal; and a solder material disposed above the second metal or a material that provides contact to a solder that is supplied by an external source. The second metal may have a melting temperature of at least 1800° C. and is not or substantially not dissolved in the solder material at least one of during a soldering process and after the soldering process.Type: ApplicationFiled: April 22, 2015Publication date: August 13, 2015Inventors: Tobias Schmidt, Evelyn Napetschnig, Franz Stueckler, Anton Pugatschow, Mark Harrison
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Publication number: 20150115313Abstract: In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.Type: ApplicationFiled: October 31, 2013Publication date: April 30, 2015Inventors: Ralf Otremba, Fabio Brucchi, Franz Stückler, Teck Sim Lee
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Patent number: 8866299Abstract: A semiconductor device includes a workpiece having a bottom surface opposite the top surface. Metallization layers are disposed over the top surface and a protective layer is disposed over the metallization layers. The semiconductor device further includes a metal silicide layer disposed on the bottom surface. The metal silicide layer is less than about five atomic layers in thickness. A first metal layer is disposed over the metal silicide layer such that a metal of the first metal layer is the same as a metal of the metal silicide layer.Type: GrantFiled: July 1, 2013Date of Patent: October 21, 2014Assignee: Infineon Technologies AGInventors: Mark Harrison, Evelyn Napetschnig, Franz Stueckler
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Publication number: 20140210061Abstract: Various embodiments provide a chip arrangement. The chip arrangement may include a first chip including a first contact and a second contact; a second chip; a leadframe including a first leadframe portion and a second leadframe portion electrically insulated from the first leadframe portion; and a plurality of pins coupled to the leadframe. At least one first pin is coupled to the first leadframe portion and at least one second pin is coupled to the second leadframe portion. The first contact of the first chip is electrically coupled to the first leadframe portion and the second contact of the first chip is coupled to the second leadframe portion. A contact of the second chip is electrically coupled to the second leadframe portion.Type: ApplicationFiled: January 28, 2013Publication date: July 31, 2014Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Ralf Otremba, Klaus Schiess, Wolfgang Scholz, Teck Sim Lee, Fabio Brucchi, Davide Chiola, Wolfgang Peinhopf, Franz Stueckler
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Publication number: 20140015141Abstract: A semiconductor device includes a workpiece having a bottom surface opposite the top surface. Metallization layers are disposed over the top surface and a protective layer is disposed over the metallization layers. The semiconductor device further includes a metal silicide layer disposed on the bottom surface. The metal silicide layer is less than about five atomic layers in thickness. A first metal layer is disposed over the metal silicide layer such that a metal of the first metal layer is the same as a metal of the metal silicide layer.Type: ApplicationFiled: July 1, 2013Publication date: January 16, 2014Applicant: Infineon Technoloiges AGInventors: Mark Harrison, Evelyn Napetschnig, Franz Stueckler
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Patent number: 8487440Abstract: A semiconductor device includes a workpiece having a bottom surface opposite the top surface. Metallization layers are disposed over the top surface and a protective layer is disposed over the metallization layers. The semiconductor device further includes a metal silicide layer disposed on the bottom surface. The metal silicide layer is less than about five atomic layers in thickness. A first metal layer is disposed over the metal silicide layer such that a metal of the first metal layer is the same as a metal of the metal silicide layer.Type: GrantFiled: July 9, 2010Date of Patent: July 16, 2013Assignee: Infineon Technologies AGInventors: Mark Harrison, Evelyn Napetschnig, Franz Stueckler