Abstract: The invention relates to a method for testing the authenticity of a data carrier (1) and/or an external device (2) which enters into data exchange with the data carrier (1). According to the invention, the data carrier (1) and the external device (2) are each equipped with a special additional apparatus (4, 6) for generating and/or testing authenticity data. Data transmission between the data carrier (1) and the external device (2) as required for authenticity testing is performed at least partly via a special transmission channel (B). The transmission channel (B) for transmitting authenticity data is separated physically or logically from a transmission channel (A) for transmitting standard data so that there is no mutual interference of data transmission via the two transmission channels (A, B).

Abstract: A method for testing the authenticity of a data carrier having at least an integrated circuit with memory units and logic units as well as a data line for data exchange with an external device. The invention is characterized in that the integrated circuit additionally has a separate hard-wired circuit for transmitting and/or receiving data during the power-up sequence, which is used for authenticity testing, the first transmission or reception of data being completed within a defined time domain of the power-up sequence in which the data line has no defined state.

Abstract: A data carrier having an electronic module includes an integrated circuit. The integrated circuit has not only has the usual components, but also an electronic check unit having a nonvolatile memory area and a separate interface. During normal operation of the data carrier, data are written additionally in the electronic check unit. If functional failure of the electronic module of the data carrier occurs, the data are still readable from the memory of the electronic check unit via the separate inter-face even if the integrated circuit is otherwise mechanically destroyed.

Abstract: A data protective microprocessor circuit for preventing access to data or programs stored in memories, includes a microprocessor, a memory for storing an operating system, at least one memory with an individual secondary program, a circuit for monitoring a particular valid address and generating a first signal, a circuit for monitoring particular contents of a microprocessor program counter and generating a second signal, and a circuit for generating an inhibit signal based on said first and second signals.