Abstract: The present invention is an inverted III-nitride light-emitting device (LED) with enhanced total light generating capability. A large area device has an n-electrode that interposes the p-electrode metallization to provide low series resistance. The p-electrode metallization is opaque, highly reflective, and provides excellent current spreading. The p-electrode at the peak emission wavelength of the LED active region absorbs less than 25% of incident light per pass. A submount may be used to provide electrical and thermal connection between the LED die and the package. The submount material may be Si to provide electronic functionality such as voltage-compliance limiting operation. The entire device, including the LED-submount interface, is designed for low thermal resistance to allow for high current density operation. Finally, the device may include a high-refractive-index (n>1.8) superstrate.

Abstract: The present invention is an inverted III-nitride light-emitting device (LED) with enhanced total light generating capability. A large area device has an n-electrode that interposes the p-electrode metallization to provide low series resistance. The p-electrode metallization is opaque, highly reflective, and provides excellent current spreading. The p-electrode at the peak emission wavelength of the LED active region absorbs less than 25% of incident light per pass. A submount may be used to provide electrical and thermal connection between the LED die and the package. The submount material may be Si to provide electronic functionality such as voltage-compliance limiting operation. The entire device, including the LED-submount interface, is designed for low thermal resistance to allow for high current density operation. Finally, the device may include a high-refractive-index (n>1.8) superstrate.

Abstract: The present invention is an inverted III-nitride light-emitting device (LED) with enhanced total light generating capability. A large area device has an n-electrode that interposes the p-electrode metallization to provide low series resistance. The p-electrode metallization is opaque, highly reflective, and provides excellent current spreading. The p-electrode at the peak emission wavelength of the LED active region absorbs less than 25% of incident light per pass. A submount may be used to provide electrical and thermal connection between the LED die and the package. The submount material may be Si to provide electronic functionality such as voltage-compliance limiting operation. The entire device, including the LED-submount interface, is designed for low thermal resistance to allow for high current density operation. Finally, the device may include a high-refractive-index (n>1.8) superstrate.

Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.

Abstract: The invention is a method for designing semiconductor light emitting devices such that the side surfaces (surfaces not parallel to the epitaxial layers) are formed at preferred angles relative to vertical (normal to the plane of the light-emitting active layer) to improve light extraction efficiency and increase total light output efficiency. Device designs are chosen to improve efficiency without resorting to excessive active area-yield loss due to shaping. As such, these designs are suitable for low-cost, high-volume manufacturing of semiconductor light-emitting devices with improved characteristics.

Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.

Abstract: A light emitting device includes a heterojunction having a p-type layer and an n-type layer. The n-electrode is electrically connected to the n-type layer while the p-electrode is electrically connected to the p-type layer. The p and n-electrodes are positioned to form a region having uniform light intensity.

Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.

Abstract: The invention is a method for designing semiconductor light emitting devices such that the side surfaces (surfaces not parallel to the epitaxial layers) are formed at preferred angles relative to vertical (normal to the plane of the light-emitting active layer) to improve light extraction efficiency and increase total light output efficiency. Device designs are chosen to improve efficiency without resorting to excessive active area-yield loss due to shaping. As such, these designs are suitable for low-cost, high-volume manufacturing of semiconductor light-emitting devices with improved characteristics.

Abstract: A solderable light-emitting diode (LED) chip and a method of fabricating an LED lamp embodying the LED chip utilize a diffusion barrier that appreciably blocks molecular migration between two different layers of the LED chip during high temperature processes. In the preferred embodiment, the two different layers of the LED chip are a back reflector and a solder layer. The prevention of intermixing of the materials in the back reflector and the solder layer impedes degradation of the back reflector with respect to its ability to reflect light emitted by the LED. The LED chip includes a high power AlInGaP LED or other type of LED, a back reflector, a diffusion barrier and a solder layer. Preferably, the back reflector is composed of silver (Ag) or Ag alloy and the solder layer is made of indium (In), lead (Pb), gold (Au), tin (Sn), or their alloy and eutectics. In a first embodiment, the diffusion layer is made of nickel (Ni) or nickel-vanadium (NiV).

Abstract: Methods for the fabrication of TS LED chips with improved light extraction and optics, particularly increased top surface emission, and the TS LEDs so fabricated are described. Non-absorbing DBRs within the chip permit the fabrication of the LEDs. The transparent DBRs redirect light away from absorbing regions such as contacts within the chip, increasing the light extraction efficiency of the LED. The non-absorbing DBRs can also redirect light toward the top surface of the chip, improving the amount of top surface emission and the on-axis intensity of the packaged LED. These benefits are accomplished with optically non-absorbing layers, maintaining the advantages of a TS LED, which advantages include .about.6 light escape cones, and improved multiple pass light extraction.

Abstract: Light emitting diodes with highly reflective contacts and methods for fabricating them are described. In a first preferred embodiment of the present invention, LEDs with reflective contacts are formed using a laser to create small alloyed dots in a highly reflective metal evaporated on the top and bottom surface of the LED chip. Using this technique, most of the bottom surface remains highly reflective, and only those portions of the bottom surface where the laser struck become absorbing. Typically, only 1% of the bottom surface is formed into contacts, leaving 99% of the bottom surface to serve as a reflecting surface. The 1% of the surface, however, provides an adequate low resistance ohmic contact. LEDs fabricated with this technique allow photons to bounce off the rear surface more than 20 times before there is a 50% chance of absorption.

Abstract: A method for fabricating transparent substrate vertical cavity surface emitting lasers ("VCSEL"s) using wafer bonding is described. The VCSELs have their active layers located much more closely to a heat sink than is possible in known absorbing substrate VCSELs. The improved heat transport from the active layer to the heat sink permits higher current operation with increased light output as a result of the lower thermal impedance of the system. Alternatively, the same light output can be obtained from the wafer bonded VCSEL at lower drive currents. Additional embodiments use wafer bonding to improve current crowding, current and/or optical confinement in a VCSEL and to integrate additional optoelectronic devices with the VCSEL.

Abstract: Methods for the fabrication of TS LED chips with improved light extraction and optics, particularly increased top surface emission, and the TS LEDs so fabricated are described. Non-absorbing DBRs within the chip permit the fabrication of the LEDs. The transparent DBRs redirect light away from absorbing regions such as contacts within the chip, increasing the light extraction efficiency of the LED. The non-absorbing DBRs can also redirect light toward the top surface of the chip, improving the amount of top surface emission and the on-axis intensity of the packaged LED. These benefits are accomplished with optically non-absorbing layers, maintaining the advantages of a TS LED, which advantages include .about.6 light escape cones, and improved multiple pass light extraction.

Abstract: A method for forming an ohmic interface between unipolar (isotype) compound semiconductor wafers without a metallic interlayer and the semiconductor devices formed with these ohmic interfaces are disclosed. The ohmic interface is formed by simultaneously matching the crystallographic orientation of the wafer surfaces and the rotational alignment within the surfaces of the two wafers and then subjecting them to applied uniaxial pressure under high temperatures to form the bonded ohmic interface. Such an ohmic interface is required for the practical implementation of devices wherein electrical current is passed from one bonded wafer to another.

Abstract: This method relates to the fabrication of semiconductor light-emitting devices having at least one ordered textured interface. Controlled interface texturing with an ordered pattern is provided on any or all interfaces of such a device to enhance light extraction from these interfaces and thus improve the performance of the device.Ordered interface texturing offers an improvement in light extraction by increasing the transmission of total optical power from the device into the ambient. This improvement is possible because ordered interface texturing can provide: 1) a reduction in Fresnel losses at the interface between the device and the ambient and, 2) a change or increase in the angular bandwidth of light which may transmit power into the ambient. This latter effect may be thought of a change or increase in the escape cone at an interface. Both effects can result in an overall increase in total light extraction efficiency for the LED.

Abstract: A method for fabricating transparent substrate vertical cavity surface emitting lasers ("VCSEL"s) using wafer bonding is described. The VCSELs have their active layers located much more closely to a heat sink than is possible in known absorbing substrate VCSELs. The improved heat transport from the active layer to the heat sink permits higher current operation with increased light output as a result of the lower thermal impedance of the system. Alternatively, the same light output can be obtained from the wafer bonded VCSEL at lower drive currents. Additional embodiments use wafer bonding to improve current crowding, current and/or optical confinement in a VCSEL and to integrate additional optoelectronic devices with the VCSEL.

Abstract: A method for forming an ohmic interface between unipolar (isotype) compound semiconductor wafers without a metallic interlayer and the semiconductor devices formed with these ohmic interfaces are disclosed. The ohmic interface is formed by simultaneously matching the crystallographic orientation of the wafer surfaces and the rotational alignment within the surfaces of the two wafers and then subjecting them to applied uniaxial pressure under high temperatures to form the bonded ohmic interface. Such an ohmic interface is required for the practical implementation of devices wherein electrical current is passed from one bonded wafer to another.