Patents by Inventor Fred Carvajal

Fred Carvajal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lateral DMOS design for ESD protection
    Patent number: 6064249
    Abstract: A LDMOS having improved ESD reliability and a method for designing such a LDMOS. A higher gate clamp voltage and/or minimized drain clamp voltage is used to maximize the ESD performance of the LDMOS. Given a set of design parameters, one or more of the gate clamp voltage, drain clamp voltage, or size of the LDMOS are optimized to meet the design parameters while achieving the optimum ESD performance.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: May 16, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Charvaka Duvvury, Fred Carvajal, David Briggs