Patents by Inventor Fred Gross

Fred Gross has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System for determining the position of an element in memory
    Publication number: 20070028058
    Abstract: A system for determining a position of an element in memory comprising a memory queue with a plurality of separate entries and propagate and generate logic in communication with said memory queue such that said propagate and generate logic is operable to inspect each said separate entry in said memory queue and to output one or more vectors indicating said position of said element in said memory queue.
    Type: Application
    Filed: August 1, 2005
    Publication date: February 1, 2007
    Inventors: David Bradley, Fred Gross
  • Apparatus and method for compressing redundancy information for embedded memories, including cache memories, of integrated circuits
    Patent number: 7162669
    Abstract: An embedded memory on an integrated circuit has a memory cell array equipped with replacement cells and mapping logic for electronically substituting the replacement cells for defective cells at at least one location in the memory cell array. The memory also has programmable links for storing redundancy information in a compressed format, and decoding logic for decompressing the redundancy information and controlling the mapping logic.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: January 9, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Fred Gross
  • Apparatus and method for compressing redundancy information for embedded memories, including cache memories, of integrated circuits
    Publication number: 20040255209
    Abstract: An embedded memory on an integrated circuit has a memory cell array equipped with replacement cells and mapping logic for electronically substituting the replacement cells for defective cells at at least one location in the memory cell array. The memory also has programmable links for storing redundancy information in a compressed format, and decoding logic for decompressing the redundancy information and controlling the mapping logic.
    Type: Application
    Filed: June 10, 2003
    Publication date: December 16, 2004
    Inventor: Fred Gross
  • Integrated circuit having provisions for remote storage of chip specific operating parameters
    Patent number: 6433405
    Abstract: An integrated circuit having programmable fuse provisions separate from critical circuitry, for storing chip specific operational information necessary for proper integrated circuit operation. These separate provisions include a fuse block which contains the programmable fuse. The fuse block is positioned adjacent to a current source input which is used to provide current to the programmable fuse for purposes of programming the programmable fuse with the chip specific operational information.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: August 13, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Jason R Gunderson, Fred Gross