Abstract: An integrated circuit comprises random logic communicatively coupled to a non-scannable memory array. The integrated circuit also comprises a built-in self-test (BIST) controller adapted to apply test data to the random logic and propagate the test data through the random logic to test the memory array.

Abstract: A scan system comprises a scan engine adapted to receive a scan request from a host system for performing a scan test on a system-under-test. The scan engine comprises dedicated logic where a state of the dedicated logic is adapted to control processing of the scan request on the system-under-test.

Abstract: An in-circuit testing system comprises an integrated circuit having a tri-state control pin used for inducing a tri-state mode in the integrated circuit during a scan test of the integrated circuit for controlling a time period for outputting a value associated with the scan test.

Abstract: An in-circuit testing system comprises an integrated circuit having a tri-state control pin used for inducing a tri-state mode in the integrated circuit during a scan test of the integrated circuit for controlling a time period for outputting a value associated with the scan test.

Abstract: A scan system comprises a scan engine adapted to receive a scan request from a host system for performing a scan test on a system-under-test. The scan engine comprises dedicated logic where a state of the dedicated logic is adapted to control processing of the scan request on the system-under-test.

Abstract: An integrated circuit comprises random logic communicatively coupled to a non-scannable memory array. The integrated circuit also comprises a built-in self-test (BIST) controller adapted to apply test data to the random logic and propagate the test data through the random logic to test the memory array.

Abstract: An electronic circuit assembly test apparatus comprises a support member having a plurality of probes each adapted to contact a corresponding test area of an electronic circuit assembly. The apparatus also comprises a probe assembly coupled to the support member. The probe assembly also comprises a plurality of probes where a spacing density of the probes of the probe assembly is greater than a spacing density of the probes of the support member.

Abstract: A test fixture for performing in-circuit testing of a printed circuit assembly may comprise a board having a front surface and a back surface. A probe assembly also having a front surface and a back surface is mounted to the board so that the back surface of the probe assembly is adjacent the front surface of the board. The probe assembly includes at least one front surface contact pad positioned on the front surface of the probe assembly that is electrically connected to at least one back surface contact pad positioned on the back surface of the probe assembly. A first board pad positioned on the front surface of the board makes electrical contact with the back surface contact pad on the back surface of the probe assembly. An electrical conductor operatively associated with the board electrically connects the board pad to an input/output pad that is also provided on the board.