Abstract: According to one embodiment of the disclosure, a light beam control system includes a positive intrinsic negative diode coupled to a controller circuit. The positive intrinsic negative diode receives a portion of a light beam generated by a light source and converts the portion into a measured intensity. The controller circuit receives the measured intensity, determines an output signal according to the measured intensity and a reference, and adjusts the light beam according to the output signal.

Abstract: According to one embodiment of the disclosure, a light beam control system includes a positive intrinsic negative diode coupled to a controller circuit. The positive intrinsic negative diode receives a portion of a light beam generated by a light source and converts the portion into a measured intensity. The controller circuit receives the measured intensity, determines an output signal according to the measured intensity and a reference, and adjusts the light beam according to the output signal.

Abstract: System and method for correlation testing of SLMs using stroboscopic methods. A preferred embodiment comprises providing a test pattern to the SLM, configuring a pulsed light source to emit a short duration light pulse at a specified time, instructing the SLM to display the test pattern, emitting the short duration light pulse at the specified time, computing a correlation image based upon light reflected by the SLM, and determining the SLM's performance based upon the correlation image. The pulse of light permits the testing of dynamic and static characteristics of the SLM, while the use of optical computational units in the computation of the correlation image greatly reduces computational requirements and testing time.

Abstract: An image data processing system and method are disclosed in which image data is organized for fast and efficient transfer of image data to and from an image memory using a tile cache. Image data is stored in a memory having data words of a predetermined data width. Each data word includes a plural adjacently disposed image pixels of a single scan line. A set of consecutive data words corresponds to a two dimensional tile of the image whereby adjacent data words store image pixels of adjacent scan lines. The image data is transferred to a tile cache in these tiles. Following image processing on a tile of image data stored in the tile cache, the tile of image data is transferred back to the memory. The technique repeats for each tile of image data. Separate tiles of image data may be operated on by different data processors simultaneously.

Abstract: A data processing system comprises an input controller and an execution unit operating in a pipelined mode, where the execution unit converts the input from a page description language representation to a display list representation. The display list is further processed by a font cache server, a display list server and a source list server. The output from these servers is coupled to multiple rendering engines, which operate in parallel to generate a bitmap representation of the input data.

Abstract: A system for data communication is disclosed that comprises a hybrid circuit (220) that receives a signal. A switched gain circuit (204) coupled to the hybrid circuit (220) receives the signal from the hybrid circuit (220). A receiver circuit (206) coupled to the switched gain circuit (204) receives the signal from the switched gain circuit (204). The switched gain circuit (204) adjusts the power of the signal transmitted to the receiver circuit (206). More specifically, the switched gain circuit (204) detects the power of the signal received from the hybrid circuit (220), and adjusts the power of the signal transmitted to the receiver circuit (206) based upon the power of the signal received from the hybrid circuit (220). A method for data communication is disclosed. A signal is received using a hybrid circuit (220). The signal is transmitted to a switched gain circuit (204) coupled to the hybrid circuit (220). The power of the signal is adjusted using the switched gain circuit (204).

Abstract: A method and apparatus for measuring the transient behavior characteristics of individual micromirrors in a DMD micromirror array. The method and system use sampling techniques to measure an amount of light reflected by an individual micromirror as the entire micromirror array is stimulated with a pattern of alternating driving signals. Sampling is achieved by illuminating the DMD micromirror array with a high-speed illumination source that provides stroboscopic light flashes of very short time length. By synchronizing the light flashes with the mirror driving signal and measuring the amount of light reflected by the individual micromirrors at different points in time, the transient behavior characteristics of individual micromirrors in a DMD micromirror array can be measured with a high level of accuracy.

Abstract: A method and system for efficient buffer rendering. An object mask, typically a character font mask, is aligned with a memory tiling arrangement (1102). A tile map is generated (1104) to indicate active tiles. An active tile is selected (1106) and the portion of the buffer corresponding to the active tile is transferred (1108) from a first memory, typically an off-chip memory, to a second memory, typically an on-chip memory to allow a processor to render the band buffer tile. The portion of the band buffer is rendered (1110) and returned (1112) to the first memory. The next active tile is selected and the process continues until all active tiles have been rendered (1114).

Abstract: A method and apparatus for measuring the transient behavior characteristics of individual micromirrors in a DMD micromirror array. The method and system use sampling techniques to measure an amount of light reflected by an individual micromirror as the entire micromirror array is stimulated with a pattern of alternating driving signals. Sampling is achieved by illuminating the DMD micromirror array with a high-speed illumination source that provides stroboscopic light flashes of very short time length. By synchronizing the light flashes with the mirror driving signal and measuring the amount of light reflected by the individual micromirrors at different points in time, the transient behavior characteristics of individual micromirrors in a DMD micromirror array can be measured with a high level of accuracy.

Abstract: A computer system includes a main processing unit (12) coupled to a DSP/memory module (40). The DSP/memory module (40) includes semiconductor memory (42) and digital signal processor circuitry (44) including one or more digital signal processors (56). The DSP/memory module (40) may be placed in standard main memory sockets, such as a SIMM or DIMM sockets, and used as conventional main memory. The memory module can also be used in a smart mode, wherein the digital signal processor (56) performs operations on data for retrieval by the main processing unit (12).

Abstract: This invention is a technique of image data processing. Image data is stored in a memory having data words of a predetermined data width. Each data word includes a plural adjacently disposed image pixels of a single scan line. A set of consecutive data words corresponds to a two dimensional tile of the image whereby adjacent data words store image pixels of adjacent scan lines. The image data is transferred to a cache in these tiles. Following image processing on a tile of image data stored in the cache, the tile of image data is transferred back to the memory. The technique repeats for each tile of image data. Separate tiles of image data may be operated on by different data processors simultaneously.

Abstract: A system for data communication is disclosed that comprises a hybrid circuit (220) that receives a signal. A switched gain circuit (204) coupled to the hybrid circuit (220) receives the signal from the hybrid circuit (220). A receiver circuit (206) coupled to the switched gain circuit (204) receives the signal from the switched gain circuit (204). The switched gain circuit (204) adjusts the power of the signal transmitted to the receiver circuit (206). More specifically, the switched gain circuit (204) detects the power of the signal received from the hybrid circuit (220), and adjusts the power of the signal transmitted to the receiver circuit (206) based upon the power of the signal received from the hybrid circuit (220). A method for data communication is disclosed. A signal is received using a hybrid circuit (220). The signal is transmitted to a switched gain circuit (204) coupled to the hybrid circuit (220). The power of the signal is adjusted using the switched gain circuit (204).

Abstract: A computer system includes a main processing unit (12) coupled to a DSP/memory module (40). The DSP/memory module (40) includes semiconductor memory (42) and digital signal processor circuitry (44) including one or more digital signal processors (56). The DSP/memory module (40) may be placed in standard main memory sockets, such as a SIMM or DIMM sockets, and used as conventional main memory. The memory module can also be used in a smart mode, wherein the digital signal processor (56) performs operations on data for retrieval by the main processing unit (12).