Patents by Inventor Fred Jaffin
Fred Jaffin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9959931Abstract: A method includes determining, internal to a memory device, a number of program pulses required to program a sample of memory cells of the memory device during a first programming operation, comparing the determined number of program pulses required to program the sample of memory cells of the memory device to a target number of program pulses, and adjusting a program starting voltage level of one or more program pulses applied to one or more memory cells of the sample of memory cells during a second programming operation subsequent to the first programming operation when the determined number of program pulses required to program the sample of memory cells in the first programming operation is different than the target number so that the number of program pulses applied during the second programming operation tends toward the target number.Type: GrantFiled: February 23, 2017Date of Patent: May 1, 2018Assignee: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin, III
-
Publication number: 20170162265Abstract: A method includes determining, internal to a memory device, a number of program pulses required to program a sample of memory cells of the memory device during a first programming operation, comparing the determined number of program pulses required to program the sample of memory cells of the memory device to a target number of program pulses, and adjusting a program starting voltage level of one or more program pulses applied to one or more memory cells of the sample of memory cells during a second programming operation subsequent to the first programming operation when the determined number of program pulses required to program the sample of memory cells in the first programming operation is different than the target number so that the number of program pulses applied during the second programming operation tends toward the target number.Type: ApplicationFiled: February 23, 2017Publication date: June 8, 2017Applicant: MICRON TECHNOLOGY, INC.Inventors: June Lee, Fred Jaffin, III
-
Patent number: 9613706Abstract: A method includes sending a number of program/erase cycles from a memory of control logic of a memory device to a counter of the control logic, where the number of program/erase cycles has been previously applied to one or more memory cells of an array of memory cells of the memory device, using the counter to increment the number of program/erase cycles each time an additional program/erase cycle is applied to the one or more memory cells, using compare logic of the control logic to compare the incremented number of program/erase cycles to a numerical value, and using starting-voltage level control logic of the control logic to adjust a program starting voltage level and/or an erase starting voltage level based on the comparison of the incremented number of program/erase cycles to the numerical value.Type: GrantFiled: March 3, 2016Date of Patent: April 4, 2017Assignee: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin, III
-
Publication number: 20160189782Abstract: A method includes sending a number of program/erase cycles from a memory of control logic of a memory device to a counter of the control logic, where the number of program/erase cycles has been previously applied to one or more memory cells of an array of memory cells of the memory device, using the counter to increment the number of program/erase cycles each time an additional program/erase cycle is applied to the one or more memory cells, using compare logic of the control logic to compare the incremented number of program/erase cycles to a numerical value, and using starting-voltage level control logic of the control logic to adjust a program starting voltage level and/or an erase starting voltage level based on the comparison of the incremented number of program/erase cycles to the numerical value.Type: ApplicationFiled: March 3, 2016Publication date: June 30, 2016Applicant: MICRON TECHNOLOGY, INC.Inventors: June Lee, Fred Jaffin, III
-
Patent number: 9299441Abstract: For one embodiment, a programming method includes programming one or more memory cells of a memory device during a programming operation, determining, internal to the memory device, a number of program pulses required to program a sample of the one or more memory cells of the memory device during the programming operation, and adjusting a program starting voltage level of one or more program pulses applied to the one or more memory cells during a subsequent programming operation in response, at least in part, to the number of program pulses required to program the sample of the one or more memory cells programed during the prior programming operation.Type: GrantFiled: March 20, 2014Date of Patent: March 29, 2016Assignee: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin, III
-
Publication number: 20140204679Abstract: For one embodiment, a programming method includes programming one or more memory cells of a memory device during a programming operation, determining, internal to the memory device, a number of program pulses required to program a sample of the one or more memory cells of the memory device during the programming operation, and adjusting a program starting voltage level of one or more program pulses applied to the one or more memory cells during a subsequent programming operation in response, at least in part, to the number of program pulses required to program the sample of the one or more memory cells programed during the prior programming operation.Type: ApplicationFiled: March 20, 2014Publication date: July 24, 2014Applicant: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin, III
-
Patent number: 8699272Abstract: For one embodiment, a programming method includes programming one or more memory cells of a memory device during a programming operation, determining, internal to the memory device, a number of program pulses required to program a sample of the one or more memory cells of the memory device during the programming operation, and adjusting a program starting voltage level of one or more program pulses applied to the one or more memory cells during a subsequent programming operation in response, at least in part, to the number of program pulses required to program the sample of the one or more memory cells programmed during the prior programming operation.Type: GrantFiled: May 16, 2012Date of Patent: April 15, 2014Assignee: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin, III
-
Publication number: 20120224431Abstract: For one embodiment, a programming method includes programming one or more memory cells of a memory device during a programming operation, determining, internal to the memory device, a number of program pulses required to program a sample of the one or more memory cells of the memory device during the programming operation, and adjusting a program starting voltage level of one or more program pulses applied to the one or more memory cells during a subsequent programming operation in response, at least in part, to the number of program pulses required to program the sample of the one or more memory cells programmed during the prior programming operation.Type: ApplicationFiled: May 16, 2012Publication date: September 6, 2012Inventors: June Lee, Fred Jaffin, III
-
Patent number: 8194458Abstract: For one embodiment, a program starting voltage of one or more program pulses applied to one or more memory cells is in response, at least in part, to on a number of program pulses previously required to program the one or more memory cells and/or an erase starting voltage of one or more erase pulses applied to one or more memory cells is based on a number of erase pulses previously required to erase the one or more memory cells. For another embodiment, a program starting voltage level and/or an erase starting voltage level of one or more program and/or erase pulses applied to one or more memory cells is in response, at least in part, to a number of program/erase cycles previously applied to the one or more memory cells.Type: GrantFiled: March 16, 2010Date of Patent: June 5, 2012Assignee: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin, III
-
Publication number: 20100172186Abstract: For one embodiment, a program starting voltage of one or more program pulses applied to one or more memory cells is in response, at least in part, to on a number of program pulses previously required to program the one or more memory cells and/or an erase starting voltage of one or more erase pulses applied to one or more memory cells is based on a number of erase pulses previously required to erase the one or more memory cells. For another embodiment, a program starting voltage level and/or an erase starting voltage level of one or more program and/or erase pulses applied to one or more memory cells is in response, at least in part, to a number of program/erase cycles previously applied to the one or more memory cells.Type: ApplicationFiled: March 16, 2010Publication date: July 8, 2010Inventors: June Lee, Fred Jaffin, III
-
Patent number: 7679961Abstract: For one embodiment, a program starting voltage of one or more program pulses applied to one or more memory cells is in response, at least in part, to on a number of program pulses previously required to program the one or more memory cells and/or an erase starting voltage of one or more erase pulses applied to one or more memory cells is based on a number of erase pulses previously required to erase the one or more memory cells. For another embodiment, a program starting voltage level and/or an erase starting voltage level of one or more program and/or erase pulses applied to one or more memory cells is in response, at least in part, to a number of program/erase cycles previously applied to the one or more memory cells.Type: GrantFiled: April 25, 2007Date of Patent: March 16, 2010Assignee: Micron Technology, Inc.Inventors: June Lee, Fred Jaffin
-
Publication number: 20080266970Abstract: For one embodiment, a program starting voltage of one or more program pulses applied to one or more memory cells is in response, at least in part, to on a number of program pulses previously required to program the one or more memory cells and/or an erase starting voltage of one or more erase pulses applied to one or more memory cells is based on a number of erase pulses previously required to erase the one or more memory cells. For another embodiment, a program starting voltage level and/or an erase starting voltage level of one or more program and/or erase pulses applied to one or more memory cells is in response, at least in part, to a number of program/erase cycles previously applied to the one or more memory cells.Type: ApplicationFiled: April 25, 2007Publication date: October 30, 2008Inventors: June Lee, Fred Jaffin
-
Patent number: 6469932Abstract: A flash memory device incorporating redundant rows. The memory device includes a memory array, control circuitry and a register. The control circuitry controls operations to the memory array. The register stores an address of a defect in the memory array and data indicating a type of defect associated with the address. The control circuitry increments row addresses during an erase operation based on the type of defect stored in the register.Type: GrantFiled: March 12, 2001Date of Patent: October 22, 2002Assignee: Micron Technology, Inc.Inventors: Frankie F. Roohparvar, Fred Jaffin, Abrahim Abedifard
-
Publication number: 20020126529Abstract: A flash memory device incorporating redundant rows. The memory device includes a memory array, control circuitry and a register. The control circuitry controls operations to the memory array. The register stores an address of a defect in the memory array and data indicating a type of defect associated with the address. The control circuitry increments row addresses during an erase operation based on the type of defect stored in the register.Type: ApplicationFiled: March 12, 2001Publication date: September 12, 2002Applicant: Micron Technology, Inc.Inventors: Frankie F. Roohparvar, Fred Jaffin, Ebrahim Abedifard