Abstract: A demodulator for demodulating an amplified shift keyed (ASK) signal includes an envelope detector generating an envelope signal, a low-pass filter generating a filtered envelope signal, a switch coupled to disengage the low-pass filter in response to a first control signal, a comparator with hysteresis comparing the envelope signal and the filtered envelope signal. In operation, the switch is open or close in response to the first control signal to cause the demodulator to operate in one of multiple operation modes. In one operation mode, the demodulator uses a small capacitor to form a low-pass filter having a cut-off frequency equal to or greater than the bit-rate of the ASK signal and the demodulator receives an ASK signal having any coding pattern, including ASK signals having unequal number of 1's and 0's.

Abstract: A current source for providing a current proportional to absolute temperature (a PTAT current) with high precision is implemented using only one off-chip component. The current source utilizes a bandgap voltage, a voltage related to a current proportional to absolute temperature and a constant current to bias a pair of voltage controlled resistive devices. In operation, a known resistance is derived by applying a constant voltage across and a constant current through a first voltage controlled resistive device. A control voltage for maintaining the constant current through the first voltage controlled resistive device is applied to control the second voltage controlled resistive device, thereby generating the highly precise PTAT current at the second voltage controlled resistive device. In one embodiment, the current source uses only one off-chip resistor in a constant current source for generating the constant current.

Abstract: An apparatus comprising a first circuit configured to generate (i) a pump up signal in response to a reference signal and a reset signal and (ii) a pump down signal in response to an input signal and said reset signal and a second circuit configured to (i) generate said reset signal in response to said pump up signal and said pump down signal.

Abstract: A circuit provides an output signal for modulating the oscillation frequency of a voltage-controlled oscillator (VCO) in response to a control signal where the VCO includes a first voltage-controlled variable capacitance device for varying the oscillation frequency of the VCO according to the output signal. The circuit includes a charge pump providing a charge current to a first node, a first capacitor having a fixed capacitance and a second capacitor both coupled to the first node, and an amplifier providing the output signal. The second capacitor includes a second voltage-controlled variable capacitance device having the same device structure as the first voltage-controlled variable capacitance device of the VCO. In operation, a voltage change at the first node is generated in response to the charge current and the output signal causes the same voltage change to be applied across the first voltage-controlled variable capacitance device of the VCO.

Abstract: A circuit provides an output signal for modulating the oscillation frequency of a voltage-controlled oscillator (VCO) in response to a control signal where the VCO includes a first voltage-controlled variable capacitance device for varying the oscillation frequency of the VCO according to the output signal. The circuit includes a charge pump providing a charge current to a first node, a first capacitor having a fixed capacitance and a second capacitor both coupled to the first node, and an amplifier providing the output signal. The second capacitor includes a second voltage-controlled variable capacitance device having the same device structure as the first voltage-controlled variable capacitance device of the VCO. In operation, a voltage change at the first node is generated in response to the charge current and the output signal causes the same voltage change to be applied across the first voltage-controlled variable capacitance device of the VCO.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to present (i) a pump up signal in response to a reference signal and a reset signal and (ii) a pump down signal in response to an input signal and the reset signal. The second circuit may be configured to (i) switch a pull up signal in response to the pump up signal, (ii) switch a pull down signal in response to the pump down signal, and (iii) present the reset signal in response to switching the pull up signal and the pull down signal.

Abstract: A circuit than may be used in an integrated circuit capacitor design. The circuit generally comprises a multilayer capacitor and a buffer. The multilayer capacitor may be configured as (i) a first capacitance, (ii) a second capacitance, and (iii) a third capacitance in series between the first capacitance and the second capacitance. The buffer may be configured to maintain a constant voltage across the third capacitance to isolate the first capacitance from the second capacitance.