Patents by Inventor Fred Liao
Fred Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8428375Abstract: Methods and systems for data compression and decompression in a graphics processing system are provided. For example, in at least one embodiment, a method comprises distributing the graphics data values of a pixel block about zero to minimize redundancy, and the pixel block includes a plurality of quadrants. The method further comprises determining whether to encode the distributed graphics data values, and responsive to a determination to encode the distributed graphics data values, encoding at least one graphics data value of one of the quadrants depending on an encoding indicator. The encoding includes determining an entropy parameter and dividing each positive data value by the entropy parameter yielding an entropy part and a noise part.Type: GrantFiled: November 17, 2010Date of Patent: April 23, 2013Assignee: VIA Technologies, Inc.Inventors: Qunfeng (Fred) Liao, Mike Hong
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Publication number: 20120121198Abstract: Methods and systems for data compression and decompression in a graphics processing system are provided. For example, in at least one embodiment, a method comprises distributing the graphics data values of a pixel block about zero to minimize redundancy, and the pixel block includes a plurality of quadrants. The method further comprises determining whether to encode the distributed graphics data values, and responsive to a determination to encode the distributed graphics data values, encoding at least one graphics data value of one of the quadrants depending on an encoding indicator. The encoding includes determining an entropy parameter and dividing each positive data value by the entropy parameter yielding an entropy part and a noise part.Type: ApplicationFiled: November 17, 2010Publication date: May 17, 2012Applicant: VIA TECHNOLOGIES, INC.Inventors: Qunfeng (Fred) Liao, Mike Hong
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Patent number: 7999819Abstract: Provided are methods for managing texture data. The methods include preloading a first plurality of texture descriptor values from a memory location in a first buffer located in a first logic block, wherein the first buffer is further configured to receive data corresponding to non-texture functions performed in the first logic block and preloading the first plurality of texture descriptor values from a memory location into a second buffer in a second logic block if the first buffer is full. The methods further include utilizing the first plurality of texture descriptor values, within the second logic block, to perform a shader calculation, and loading, dynamically, a second plurality of texture descriptor values from memory into the first buffer, wherein the first logic block requires additional data. Additionally, the methods can include writing, if the first buffer is full, the second plurality of texture descriptor values over a portion of the first plurality of texture descriptor values.Type: GrantFiled: November 20, 2007Date of Patent: August 16, 2011Assignee: Via Technologies, Inc.Inventors: Fred Liao, Yijung Su, Yiping Chen, Mark Zheng
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Patent number: 7876329Abstract: Provided are methods for managing texture data in Graphics Processing Units (GPUs). The methods include receiving, into an arbiter, a preload request configured to request processing of texture data in advance of shader processing and receiving, into the arbiter, a dependent read request configured to request processing of texture data after shader processing. The methods also include receiving, into the arbiter, a capacity signal from a texture buffer and determining, utilizing the virtual buffer capacity signal, a selected request corresponding which of the preload request and the dependent read request is granted. The methods further include processing, in a texture processor, texture data corresponding to the selected request.Type: GrantFiled: September 10, 2007Date of Patent: January 25, 2011Assignee: Via Technologies, Inc.Inventors: Fred Liao, Yijung Su, Yiping Chen, Mark Zheng
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Patent number: 7876328Abstract: Provided is a system for managing multiple contexts in a decentralized graphics processing unit. The system includes multiple control units that can include a context buffer, a context processor, and a context scheduler. Also included is logic to receive multiple contexts, logic to identify at least one of the contexts, and logic to facilitate communication among the control units.Type: GrantFiled: February 8, 2007Date of Patent: January 25, 2011Assignee: Via Technologies, Inc.Inventors: Qunfeng (Fred) Liao, Yang (Jeff) Jiao, Yijung Su
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Patent number: 7737983Abstract: A method for high level synchronization between an application and a graphics pipeline comprises receiving an application instruction in an input stream at a predetermined component, such as a command stream processor (CSP), as sent by a central processing unit. The CSP may have a first portion coupled to a next component in the graphics pipeline and a second portion coupled to a plurality of components of the graphics pipeline. A command associated with the application instruction may be forwarded from the first portion to the next component in the graphics pipeline or some other component coupled thereto. The command may be received and thereafter executed. A response may be communicated on a feedback path to the second portion of the CSP. Nonlimiting exemplary application instructions that may be received and executed by the CSP include check surface fault, trap, wait, signal, stall, flip, and trigger.Type: GrantFiled: October 25, 2006Date of Patent: June 15, 2010Assignee: Via Technologies, Inc.Inventors: John Brothers, Timour Paltashev, Hsilin Huang, Boris Prokopenko, Qunfeng (Fred) Liao
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Systems and methods for providing shared attribute evaluation circuits in a graphics processing unit
Patent number: 7551176Abstract: Systems and method for providing shared attribute evaluation circuits in a graphics processing unit are provided. One embodiment can be described as a system for evaluating attributes in a graphics processing unit having a plurality of processing stages. The system can include an evaluation block, configured to process a plurality of attributes corresponding to a plurality of pixels and a plurality of FIFO buffers, each configured between one of the plurality of processing stages and the evaluation block. An embodiment can further include a shared buffer, configured to store the plurality of attributes or pointers during the attribute processing and processing priority logic, configured to determine a plurality of priorities corresponding to the plurality of attributes.Type: GrantFiled: August 24, 2006Date of Patent: June 23, 2009Assignee: Via Technologies, Inc.Inventors: Fred Liao, John Brothers -
Publication number: 20090128575Abstract: Provided are methods for managing texture data. The methods include preloading a first plurality of texture descriptor values from a memory location in a first buffer located in a first logic block, wherein the first buffer is further configured to receive data corresponding to non-texture functions performed in the first logic block and preloading the first plurality of texture descriptor values from a memory location into a second buffer in a second logic block if the first buffer is full. The methods further include utilizing the first plurality of texture descriptor values, within the second logic block, to perform a shader calculation, and loading, dynamically, a second plurality of texture descriptor values from memory into the first buffer, wherein the first logic block requires additional data. Additionally, the methods can include writing, if the first buffer is full, the second plurality of texture descriptor values over a portion of the first plurality of texture descriptor values.Type: ApplicationFiled: November 20, 2007Publication date: May 21, 2009Applicant: VIA TECHNOLOGIES, INC.Inventors: Fred Liao, Yijung Su, Yiping Chen, Mark Zheng
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Publication number: 20090066714Abstract: Provided are methods for managing texture data in Graphics Processing Units (GPUs). The methods include receiving, into an arbiter, a preload request configured to request processing of texture data in advance of shader processing and receiving, into the arbiter, a dependent read request configured to request processing of texture data after shader processing. The methods also include receiving, into the arbiter, a capacity signal from a texture buffer and determining, utilizing the virtual buffer capacity signal, a selected request corresponding which of the preload request and the dependent read request is granted. The methods further include processing, in a texture processor, texture data corresponding to the selected request.Type: ApplicationFiled: September 10, 2007Publication date: March 12, 2009Applicant: VIA TECHNOLOGIES, INC.Inventors: Fred Liao, Yijung Su, Yiping Chen, Mark Zheng
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Publication number: 20080192063Abstract: Provided is a system for managing multiple contexts in a decentralized graphics processing unit. The system includes multiple control units that can include a context buffer, a context processor, and a context scheduler. Also included is logic to receive multiple contexts, logic to identify at least one of the contexts, and logic to facilitate communication among the control units.Type: ApplicationFiled: February 8, 2007Publication date: August 14, 2008Applicant: VIA TECHNOLOGIES, INC.Inventors: Qunfeng (Fred) Liao, Yang (Jeff) Jiao, Yijung Su
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Systems and Methods for Providing Shared Attribute Evaluation Circuits in a Graphics Processing Unit
Publication number: 20080049031Abstract: Systems and method for providing shared attribute evaluation circuits in a graphics processing unit are provided. One embodiment can be described as a system for evaluating attributes in a graphics processing unit having a plurality of processing stages. The system can include an evaluation block, configured to process a plurality of attributes corresponding to a plurality of pixels and a plurality of FIFO buffers, each configured between one of the plurality of processing stages and the evaluation block. An embodiment can further include a shared buffer, configured to store the plurality of attributes or pointers during the attribute processing and processing priority logic, configured to determine a plurality of priorities corresponding to the plurality of attributes.Type: ApplicationFiled: August 24, 2006Publication date: February 28, 2008Applicant: VIA TECHNOLOGIES, INC.Inventors: Fred Liao, John Brothers -
Patent number: 7324107Abstract: A method of performing anisotropic texture mip-mapping. The method includes determining a region of support for a set of target pixels of the image to be textured, and mapping the region of support to an area in texture map that is generally elliptical. For each axis of the ellipse the number of samples is determined and a filter function is performed on those samples to find the final color value. For four texels, the filter function is a weighted sum of the color values of each texel, where the weights are determined based on the fraction of the Level of Detail (LOD) and the fraction of the U or V coordinate.Type: GrantFiled: February 20, 2004Date of Patent: January 29, 2008Assignee: Via Technologies, Inc.Inventors: Qun Feng (Fred) Liao, Zhou (Mike) Hong
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Patent number: 7262777Abstract: A method of cubic mapping with texturing is described. Neighboring pixels on an object are mapped to adjacent faces of the cube, but these adjacent faces do not guarantee continuity in the texture mip-map associated with each face. Therefore, the u and v texture map coordinates are adjusted after mapping to adjacent faces to make a continuity adjustment that insures that the LOD for the texture mip-map is the same for each adjacent face. The continuity adjustment includes either switching the u coordinate with the v coordinate or negating one of the coordinates or both. Additionally, if the u and v coordinates are normalized, the normalization may be compensated by adding or subtracting unity from the adjusted coordinate. After the continuity adjustment is made an approximation to the derivative is computed and used to determine the LOD for the mip-map. Texturing can then proceed using the LOD.Type: GrantFiled: February 20, 2004Date of Patent: August 28, 2007Assignee: VIA Technologies, Inc.Inventors: Qun Feng (Fred) Liao, Zhou (Mike) Hong
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Patent number: 7218317Abstract: Z buffer traffic experienced during graphics processing is reduced by using a compression mechanism to reduce the amount of information stored in the z buffer. The compression mechanism may be a delta-based z compression mechanism, which stores deltas in the z buffer rather than actual z values. These deltas may be used at a later time to compute the z values. By storing deltas instead of actual z values, the compression mechanism makes it possible to store significantly less information in the z buffer. By reducing the amount of information stored in the z buffer, less information will be read from and written to the z buffer, which in turn, reduces z buffer traffic. To further reduce z buffer traffic, selected deltas may be stored not in the z buffer but rather in a storage local to a graphics processing mechanism (GPM). Storing selected deltas in local storage obviates the need to read from or write to the z buffer for those deltas. As a result, z buffer traffic is even further reduced.Type: GrantFiled: August 25, 2003Date of Patent: May 15, 2007Assignee: Via Technologies, Inc.Inventors: Fred Liao, Michael Hong
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Patent number: 7126615Abstract: Systems and methods are provided for compressing computer graphics color data in a system utilizing a multi-sample anti-aliasing scheme using multiple planes for storing color data samples. Each of the planes is configured as a block of contiguous memory.Type: GrantFiled: November 12, 2004Date of Patent: October 24, 2006Assignee: VIA Technologies, Inc.Inventor: Fred Liao
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Publication number: 20060103658Abstract: Systems and methods are provided for compressing computer graphics color data in a system utilizing a multi-sample anti-aliasing scheme using multiple planes for storing color data samples. Each of the planes is configured as a block of contiguous memory.Type: ApplicationFiled: November 12, 2004Publication date: May 18, 2006Inventor: Fred Liao
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Publication number: 20050057564Abstract: Z buffer traffic experienced during graphics processing is reduced by using a compression mechanism to reduce the amount of information stored in the z buffer. The compression mechanism may be a delta-based z compression mechanism, which stores deltas in the z buffer rather than actual z values. These deltas may be used at a later time to compute the z values. By storing deltas instead of actual z values, the compression mechanism makes it possible to store significantly less information in the z buffer. By reducing the amount of information stored in the z buffer, less information will be read from and written to the z buffer, which in turn, reduces z buffer traffic. To further reduce z buffer traffic, selected deltas may be stored not in the z buffer but rather in a storage local to a graphics processing mechanism (GPM). Storing selected deltas in local storage obviates the need to read from or write to the z buffer for those deltas. As a result, z buffer traffic is even further reduced.Type: ApplicationFiled: August 25, 2003Publication date: March 17, 2005Inventors: Fred Liao, Michael Hong
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Publication number: 20040257376Abstract: A method of performing anisotropic texture mip-mapping. The method includes determining a region of support for a set of target pixels of the image to be textured, and mapping the region of support to an area in texture map that is generally elliptical. For each axis of the ellipse the number of samples is determined and a filter function is performed on those samples to find the final color value. For four texels, the filter function is a weighted sum of the color values of each texel, where the weights are determined based on the fraction of the Level of Detail (LOD) and the fraction of the U or V coordinate.Type: ApplicationFiled: February 20, 2004Publication date: December 23, 2004Inventors: Qun Feng (Fred) Liao, Zhou (Mike) Hong
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Patent number: 6476808Abstract: A token-based buffer system for a geometry pipeline in three-dimensional graphics comprises: a buffer control initialization (BCI) unit, a new token or index module, a geometry control pipeline, a vertex buffer, and a processing engine. The token-based buffer system provides a shared resource environment in which tokens are assigned for blocks of data. Each block of data includes that data necessary for each unit or stage in the geometry pipeline to perform its computation. The use of tokens is advantageous because it optimizes the storage efficiency for storing the blocks of data and ensures the correctness of the data as it is passed between stages.Type: GrantFiled: October 14, 1999Date of Patent: November 5, 2002Assignee: S3 Graphics Co., Ltd.Inventors: Dong-Ying Kuo, Mike Hong, Fred Liao
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Patent number: 6304268Abstract: A trilinear texture filtering system and method that improves the locality of texture map accesses in a multum in parvo (MIP) map so as to reduce page breaks and provide improved performance. The present invention includes a texture cache having a unique addressing and accessing scheme that allows localized reads of the texture map from each of four banks in the texture cache. This is coupled with a unique texture-mapping unit that includes a first level generator, a second level generator and an interpolator. In generating the lower-resolution texture map version, the present invention filters neighboring texels from the higher-resolution version. Thus, an n×n (e.g. 2×2) square of texels at the higher-resolution level is reduced to a single texel at the lower-resolution level. This technique permits the lower-resolution level to be derived without requiring additional read operations from texture memory with potentially poor locality.Type: GrantFiled: November 19, 1998Date of Patent: October 16, 2001Assignee: S3 Graphics Co., Ltd.Inventors: Konstantine I Iourcha, Fred Liao, Michael Hong