Patents by Inventor Fred Matteson

Fred Matteson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7510903
    Abstract: A bi-directional transient voltage suppression (“TVS”) device (101) includes a semiconductor die (201) that has a first avalanche diode (103) in series with a first rectifier diode (104) connected cathode to cathode, electrically coupled in an anti-parallel configuration with a second avalanche diode (105) in series with a second rectifier diode (106) also connected cathode to cathode. All the diodes of the TVS device are on a single semiconductor substrate (301). The die has a low resistivity buried diffused layer (303) having a first conductivity type disposed between a semiconductor substrate (301) having the opposite conductivity type and a high resistivity epitaxial layer (305) having the first conductivity type. The buried diffused layer shunts most of a transient current away from a portion of the epitaxial layer between the first avalanche diode and the first rectifier diode, thereby reducing the clamping voltage relative to the breakdown voltage.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: March 31, 2009
    Assignee: Protek Devices LP
    Inventors: Fred Matteson, Venkatesh P. Pai, Donald K. Cartmell
  • Publication number: 20080217749
    Abstract: A transient voltage suppressor includes a reverse bias transient voltage suppressor PN diode connected in series with a forward biased PIN diode, the series circuit formed by the PN diode and the PIN diode is connected between first and second terminals and in parallel with a reverse biased PIN diode.
    Type: Application
    Filed: July 27, 2006
    Publication date: September 11, 2008
    Inventors: Fred Matteson, Rakesh Kansal
  • Patent number: 7361942
    Abstract: A bi-directional transient voltage suppression (“TVS”) device (101) includes a semiconductor die (201) that has a first avalanche diode (103) in series with a first rectifier diode (104) connected cathode to cathode, electrically coupled in an anti-parallel configuration with a second avalanche diode (105) in series with a second rectifier diode (106) also connected cathode to cathode. All the diodes of the TVS device are on a single semiconductor substrate (301). The die has a low resistivity buried diffused layer (303) having a first conductivity type disposed between a semiconductor substrate (301) having the opposite conductivity type and a high resistivity epitaxial layer (305) having the first conductivity type. The buried diffused layer shunts most of a transient current away from a portion of the epitaxial layer between the first avalanche diode and the first rectifier diode, thereby reducing the clamping voltage relative to the breakdown voltage.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: April 22, 2008
    Assignee: Protek Devices, LP
    Inventors: Fred Matteson, Venkatesh Panemangalore Pai, Donald K. Cartmell
  • Patent number: 6867436
    Abstract: A bi-directional transient voltage suppression (“TVS”) device (101) includes a semiconductor die (201) that has a first avalanche diode (103) in series with a first rectifier diode (104) connected cathode to cathode, electrically coupled in an anti-parallel configuration with a second avalanche diode (105) in series with a second rectifier diode (106) also connected cathode to cathode. All the diodes of the TVS device are on a single semiconductor substrate (301). The die has a low resistivity buried diffused layer (303) having a first conductivity type disposed between a semiconductor substrate (301) having the opposite conductivity type and a high resistivity epitaxial layer (305) having the first conductivity type. The buried diffused layer shunts most of a transient current away from a portion of the epitaxial layer between the first avalanche diode and the first rectifier diode, thereby reducing the clamping voltage relative to the breakdown voltage.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: March 15, 2005
    Assignee: Protek Devices, LP
    Inventors: Fred Matteson, Venkatesh Panemangalore Pai, Donald K. Cartmell