Patents by Inventor Fred Roozeboom

Fred Roozeboom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240111216
    Abstract: A method of depositing an outer layer (35) on a surface (36) of a reflective optical element (30) for the EUV wavelength range, wherein the depositing is effected in at least one macro cycle (37). The macro cycle (37) includes: at least partly depositing the outer layer (35) with an atomic layer deposition (ALD) process in at least one ALD cycle and partly back-etching the outer layer (35). Also disclosed is a reflective optical element (30) for the extreme ultraviolet (EUV) wavelength range which includes a surface (36) having an outer layer (35), wherein the outer layer (35) is deposited by the above-described method, and to an EUV lithography system having at least one such reflective optical element (30).
    Type: Application
    Filed: December 15, 2023
    Publication date: April 4, 2024
    Inventors: Dirk EHM, Stefan SCHMIDT, Alfredo MAMELI, Fred ROOZEBOOM
  • Patent number: 11199363
    Abstract: A method for at least partially removing a contamination layer (24) from an optical surface (14a) of an optical element (14) that reflects EUV radiation includes: performing an atomic layer etching process for at least partially removing the contamination layer (24) from the optical surface (14a), which, in turn, includes: exposing the contamination layer (24) to a surface-modifying reactant (44) in a surface modification step, and exposing the contamination layer (24) to a material-detaching reactant (45) in a material detachment step. The optical element (14) is typically taken, before the atomic layer etching process is performed, from an optical arrangement, in particular from an EUV lithography system, in which the optical surface (14a) of the optical element (14) is exposed to EUV radiation (6), during which the contamination layer (24) is formed.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: December 14, 2021
    Assignee: CARL ZEISS SMT GMBH
    Inventors: Fred Roozeboom, Dirk Heinrich Ehm, Andrea Illiberi, Moritz Becker, Edwin Te Sligte, Yves Lodewijk Maria Creijghton
  • Publication number: 20200142327
    Abstract: A method for at least partially removing a contamination layer (24) from an optical surface (14a) of an optical element (14) that reflects EUV radiation includes: performing an atomic layer etching process for at least partially removing the contamination layer (24) from the optical surface (14a), which, in turn, includes: exposing the contamination layer (24) to a surface-modifying reactant (44) in a surface modification step, and exposing the contamination layer (24) to a material-detaching reactant (45) in a material detachment step. The optical element (14) is typically taken, before the atomic layer etching process is performed, from an optical arrangement, in particular from an EUV lithography system, in which the optical surface (14a) of the optical element (14) is exposed to EUV radiation (6), during which the contamination layer (24) is formed.
    Type: Application
    Filed: January 6, 2020
    Publication date: May 7, 2020
    Inventors: Fred ROOZEBOOM, Dirk Heinrich EHM, Andrea ILLIBERI, Moritz BECKER, Edwin TE SLIGTE, Yves Lodewijk Maria CREIJGHTON
  • Patent number: 8809081
    Abstract: An electronic device comprising at least one die stack having at least a first die (D1) comprising a first array of light emitting units (OLED) for emitting light, a second layer (D2) comprising a second array of via holes (VH) and a third die (D3) comprising a third array of light detecting units (PD) for detecting light from the first array of light emitting units (OELD) is provided. The second layer (D2) is arranged between the first die (D1) and the third die (D3). The first, second and third array are aligned such that light emitted from the first array of light emitting units (OLED) passed through the second array of via holes (VH) and is detected by the third array of light detecting units (PD). The first array of light emitting units and/or the third array of light detecting units are manufactured based on standard semiconductor manufacturing processes.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: August 19, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fred Roozeboom, Herbert Lifka, Fredrik Vanhelmont, Wouter Dekkers
  • Publication number: 20140038322
    Abstract: An electronic device comprising at least one die stack having at least a first die (D1) comprising a first array of light emitting units (OLED) for emitting light, a second layer (D2) comprising a second array of via holes (VH) and a third die (D3) comprising a third array of light detecting units (PD) for detecting light from the first array of light emitting units (OELD) is provided. The second layer (D2) is arranged between the first die (D1) and the third die (D3). The first, second and third array are aligned such that light emitted from the first array of light emitting units (OLED) passed through the second array of via holes (VH) and is detected by the third array of light detecting units (PD). The first array of light emitting units and/or the third array of light detecting units are manufactured based on standard semiconductor manufacturing processes.
    Type: Application
    Filed: October 22, 2013
    Publication date: February 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fred Roozeboom, Herbert Lifka, Fredrik Vanhelmont, Wouter Dekkers
  • Patent number: 7986184
    Abstract: A variety of circuits, methods and devices are implemented for radiofrequency amplifiers. According to one such implementation, a radiofrequency amplifier circuit is implemented in a SMD package. The circuit amplifies a radiofrequency signal having a base-band portion and a plurality of carrier signals frequency-spaced larger than the base-band bandwidth. The circuit includes a radiofrequency transistor connected to a circuit output having a parasitic output capacitance. The source-drain terminal is electrically connected to the circuit output. An internal shunt inductor provides compensation for the parasitic output capacitance. A high-density capacitor is connected between the internal shunt inductor and a circuit ground. The high-density capacitor has a terminal with a surface area can be at least ten times that of a corresponding planar surface.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: July 26, 2011
    Assignee: NXP B.V.
    Inventors: Willem Frederick Adrianus Besling, Theodorus Wilhelmus Bakker, Yann Lamy, Jinesh Kochupurackal, Fred Roozeboom
  • Publication number: 20110148529
    Abstract: A variety of circuits, methods and devices are implemented for radiofrequency amplifiers. According to one such implementation, a radiofrequency amplifier circuit is implemented in a SMD package. The circuit amplifies a radiofrequency signal having a base-band portion and a plurality of carrier signals frequency-spaced larger than the base-band bandwidth. The circuit includes a radiofrequency transistor connected to a circuit output having a parasitic output capacitance. The source-drain terminal is electrically connected to the circuit output. An internal shunt inductor provides compensation for the parasitic output capacitance. A high-density capacitor is connected between the internal shunt inductor and a circuit ground. The high-density capacitor has a terminal with a surface area can be at least ten times that of a corresponding planar surface.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 23, 2011
    Inventors: Willem Frederick Adrianus Besling, Theodorus Wilhelmus Bakker, Yann Lamy, Fred Roozeboom