Patents by Inventor Fred Weber
Fred Weber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9946642Abstract: In one embodiment, a distributed storage system comprises: a plurality of appliances, a distributed multimode storage management coordinator, and a communication mechanism for communicating distributed multimode storage management messages. A first one of the plurality of appliances can include: a plurality of storage devices that have a first storage partition including a first type of interface and a first information storage region and a second storage partition including a selective underlying exposure (SUE) interface and a second information storage region that stores a second type of information, wherein the SUE interface exposes an aspect of the second information storage region.Type: GrantFiled: November 20, 2015Date of Patent: April 17, 2018Assignee: SAMSUNG ELECTRONICS CO., LTDInventors: Andrew Tomlin, Fred Weber
-
Publication number: 20170139823Abstract: In one embodiment, a distributed storage system comprises: a plurality of appliances, a distributed multimode storage management coordinator, and a communication mechanism for communicating distributed multimode storage management messages. A first one of the plurality of appliances can include: a plurality of storage devices that have a first storage partition including a first type of interface and a first information storage region and a second storage partition including a selective underlying exposure (SUE) interface and a second information storage region that stores a second type of information, wherein the SUE interface exposes an aspect of the second information storage region.Type: ApplicationFiled: November 20, 2015Publication date: May 18, 2017Inventors: Andrew TOMLIN, Fred WEBER
-
Publication number: 20060233838Abstract: A vaccine for in ovo vaccination against avian coccidiosis produced by a method including obtaining the coccidial oocysts from a fecal suspension, homogenizing the fecal suspension, separating the oocysts from the fecal debris by either salt flotation using sodium sulfate or gas flotation using air, sporulating the oocysts using hydrogen peroxide and air sparging, bleaching the sporulated oocysts, washing the bleached oocysts, concentrating the sterile washed oocysts and combining the concentrates of various species of coccidial oocysts, and producing a vaccine. The method in whole or in part can be applied to other kinds of encysted protozoa to produce vaccines for various types of animals.Type: ApplicationFiled: October 12, 2005Publication date: October 19, 2006Inventors: Harold Conkle, Joseph Schultz, Scott Blonigen, Fred Weber, David Kilanowski, Bruce Monzyk, Timothy Werner, Chad Cucksey, Hamish McArthur, Ted Tewksbury
-
Patent number: 6397239Abstract: A multimedia execution unit configured to perform vectored floating point and integer instructions. The execution unit may include an add/subtract pipeline having far and close data paths. The far path is configured to handle effective addition operations and effective subtraction operations for operands having an absolute exponent difference greater than one. The close path is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close path is configured to generate two output values, wherein one output value is the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. Selection of the first or second output value in the close path effectuates the round-to-nearest operation for the output of the adder.Type: GrantFiled: February 6, 2001Date of Patent: May 28, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Stuart F. Oberman, Norbert Juffa, Fred Weber, Krishnan Ramani, Ravi Krishna Cherukuri
-
Publication number: 20010051969Abstract: A multimedia execution unit configured to perform vectored floating point and integer instructions. The execution unit may include an add/subtract pipeline having far and close data paths. The far path is configured to handle effective addition operations and effective subtraction operations for operands having an absolute exponent difference greater than one. The close path is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close path is configured to generate two output values, wherein one output value is the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. Selection of the first or second output value in the close path effectuates the round-to-nearest operation for the output of the adder.Type: ApplicationFiled: February 6, 2001Publication date: December 13, 2001Inventors: Stuart F. Oberman, Norbert Juffa, Fred Weber, Krishnan Ramani, Ravi Krishna Cherukuri
-
Patent number: 6298367Abstract: A multimedia execution unit configured to perform vectored floating point and integer instructions. The execution unit may include an add/subtract pipeline having far and close data paths. The far path is configured to handle effective addition operations and effective subtraction operations for operands having an absolute exponent difference greater than one. The close path is configured to handle effective subtraction operations for operands having an absolute exponent difference less than or equal to one. The close path is configured to generate two output values, wherein one output value is the first input operand plus an inverted version of the second input operand, while the second output value is equal to the first output value plus one. Selection of the first or second output value in the close path effectuates the round-to-nearest operation for the output of the adder.Type: GrantFiled: April 6, 1998Date of Patent: October 2, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Stuart F. Oberman, Norbert Juffa, Fred Weber, Krishnan Ramani, Ravi Krishna
-
Patent number: 6134574Abstract: A multiplier configured to obtain higher frequencies of exactly rounded results by adding an adjustment constant to intermediate products generated during iterative multiplication operations is disclosed. One such iterative multiplication operation is the Newton-Raphson iteration, which may be utilized by the multiplier to perform reciprocal calculations and reciprocal square root calculations. For each iteration, the results converge toward an infinitely precise result. To improve the frequency of the exactly rounded result, the results of the iterative calculations may be studied for a large number of differing input operands to determine the best suited value for the adjustment constant. The multiplier may also be configured to perform scalar and packed vector multiplication using the same hardware.Type: GrantFiled: May 8, 1998Date of Patent: October 17, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Stuart F. Oberman, Norbert Juffa, Fred Weber
-
Patent number: 6115732Abstract: A processor capable of efficiently performing iterative calculations is disclosed. The processor comprises a multiplier that is configured to perform iterative multiplication operations to evaluate constant powers of an operand such as the reciprocal and reciprocal square root. Intermediate products that are formed are compressed and decompressed to reduce interim storage requirements. The intermediate products may be rounded and normalized in two paths, one assuming an overflow will occur, and then compressed and stored for use in the next iteration.Type: GrantFiled: May 8, 1998Date of Patent: September 5, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Stuart F. Oberman, Norbert Juffa, Fred Weber
-
Patent number: 6115733Abstract: A processor capable of efficiently evaluating constant powers of an operand such as the reciprocal and reciprocal square root is disclosed. The processor comprises a multiplier that is configured to perform iterative multiplication operations to evaluate constant powers of an operand such as the reciprocal and reciprocal square root. Intermediate products that are formed may be rounded and normalized in two paths, one assuming an overflow will occur, and then compressed and stored for use in the next iteration. The processor comprises a multiplier capable of performing signed and unsigned scalar and vector multiplication is disclosed. The multiplier may performing rounded by adding a rounding constant.Type: GrantFiled: May 8, 1998Date of Patent: September 5, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Stuart F. Oberman, Norbert Juffa, Fred Weber
-
Patent number: 5110135Abstract: In a card game, the folding box and/or individual or every playing card thereof are provided with a printed form corresponding to the address part of a postcard or parcel. Thereby, the card game or the individual playing cards thereof are made directly accessible to mailing by post and sent as a vehicle for sending greetings, advertising media, a gift and the like.Type: GrantFiled: February 22, 1991Date of Patent: May 5, 1992Assignee: AGM Aktiengesellchaft MullerInventor: Fred Weber
-
Patent number: 5074338Abstract: The travelling cleaner for looms and such machines with rows of moving machine members comprises a compressed-air blower guided to and fro along the row of moving machine members, the compressed-air blower is disposed on a compressed-air linear motor which is movable to and fro along a guide attached to the loom supporting the row of moving loom members, and the compressed-air blower and the compressed-air linear motor are connected to a mutual compressed-air source. This renders possible for the first time, a fully-automatic, optimal cleaning of rows of moving loom or machine members on any desired loom or machine of this kind.Type: GrantFiled: May 21, 1990Date of Patent: December 24, 1991Assignee: AGM Aktiengesellschaft MullerInventor: Fred Weber