Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Abstract: According to some example embodiments according to the present disclosure, a device includes a printed circuit board (PCB); a solid state drive (SSD) connected at a first side of the PCB via at least one SSD connector; at least one field programmable gate array (FPGA) attached to the PCB at a second side of the PCB; and at least one front end connector attached to the PCB at a third side of the PCB, wherein the device is configured to process data stored in the SSD based on a command received via the at least one front end connector.

Abstract: A rack-mounted system includes a chassis, a switchless board disposed in the chassis, a midplane, and a plurality of device ports. The switchless board includes a baseboard management controller (BMC), a network repeater configured to transport network signals, and a PCIe switch configured to transport PCIe signals. Each of the plurality of device ports is configured to connect a storage device to the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable to operate in one of multiple storage protocol modes based on a type of the chassis. The network repeater of the switchless board is swappable with an Ethernet switch to provide a switching compatibility to the chassis using the same midplane. The storage device can operate in single-port and dual-port configurations.

Abstract: In an example, a device includes: a printed circuit board (PCB); at least one solid state drive (SSD) connected at a first side of the PCB via at least one SSD connector; at least one field programmable gate array (FPGA) mounted on the PCB at a second side of the PCB; and at least one connector attached to the PCB at a third side of the PCB, wherein the device is configured to operate in a first speed from a plurality of operating speeds based on a first input received via the at least one connector.

Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.

Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Abstract: A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable in multiple modes based a protocol established over a fabric connection between the system and the storage device.

Abstract: According to some example embodiments according to the present disclosure, a device includes a printed circuit board (PCB); a solid state drive (SSD) connected at a first side of the PCB via at least one SSD connector; at least one field programmable gate array (FPGA) attached to the PCB at a second side of the PCB; and at least one front end connector attached to the PCB at a third side of the PCB, wherein the device is configured to process data stored in the SSD based on a command received via the at least one front end connector.

Abstract: A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable in multiple modes based a protocol established over a fabric connection between the system and the storage device.

Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.

Abstract: A rack-mounted system includes a chassis, a switchless board disposed in the chassis, a midplane, and a plurality of device ports. The switchless board includes a baseboard management controller (BMC), a network repeater configured to transport network signals, and a PCIe switch configured to transport PCIe signals. Each of the plurality of device ports is configured to connect a storage device to the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable to operate in one of multiple storage protocol modes based on a type of the chassis. The network repeater of the switchless board is swappable with an Ethernet switch to provide a switching compatibility to the chassis using the same midplane. The storage device can operate in single-port and dual-port configurations.

Abstract: A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable in multiple modes based a protocol established over a fabric connection between the system and the storage device.

Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.

Abstract: A system and method for updating storage system includes a solid state disk (SSD) attached to a FPGA. The solid state disk is configured to receive a firmware image and a firmware upgrade module operating on the FPGA is configured to identify the presence of the firmware image on the SSD. The firmware upgrade module is further configured to store the firmware image in a buffer on the FPGA and write the firmware image.

Abstract: A system and method for updating storage system includes a solid state disk (SSD) attached to a FPGA. The solid state disk is configured to receive a firmware image and a firmware upgrade module operating on the FPGA is configured to identify the presence of the firmware image on the SSD. The firmware upgrade module is further configured to store the firmware image in a buffer on the FPGA and write the firmware image.

Abstract: A rack-mountable data storage system includes: a chassis including one or more switchboards; a midplane interfacing with the one or more switchboards; and one or more data storage devices removably coupled to the midplane using a connector. At least one data storage device of the one or more data storage devices include a logic device to interface with the midplane. The logic device provides a device-specific interface of a corresponding data storage device with the midplane. The at least one data storage device is configured using the logic device according to a first protocol based on a signal on a pin of the connector, and the at least one data storage device is reconfigurable according to a second protocol based on a change of the signal on the pin of the connector using the logic device.

Abstract: A system and method for providing erasure code data protection for an array of solid state drives. The solid state drives are connected to an Ethernet switch which includes a RAID control circuit, or a state machine, to process read or write commands that may be received from a remote host. The RAID control circuit, if present, uses a low-latency cache to execute write commands, and the state machine, if present, uses a local central processing unit, which in turn uses a memory as a low-latency cache, to similar effect.

Abstract: A system and method for supporting data protection across field programmable gate array (FPGA) solid state drives (SSDs) includes a storage system having a first group of solid state drives connected to a FPGA. The FPGA includes a first data protection controller configured to manage input/output requests to and from the first group of solid state disks according to a data protection configuration, generate parity bits according to the data protection configuration, and store the parity bits on at least parity solid state drive from the first group of solid state drives.

Abstract: A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream interface enables communication with the processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager (APM-F) to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager (APM-S) to assist the APM-F in executing the acceleration instruction. The processor, the acceleration module, and the storage device may communicate via a Peripheral Component Interconnect Exchange (PCIe) bus.

Abstract: A system includes a plurality of storage processing accelerators (SPAs), at least one SPA of the plurality of SPAs including a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs including n SPEs (n is a natural number greater than zero), where 1st to (n?1) SPEs of the n SPEs are configured to provide an output of the SPE to a next SPE of the n SPEs in a pipeline to be used as an input of the next SPE; and an acceleration platform manager (APM) connected to the plurality of the SPAs and the plurality of SPEs, and configured to control data processing in the plurality of SPAs and the plurality of SPEs.