Patents by Inventor Frederic Dupont

Frederic Dupont has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8785293
    Abstract: The invention relates to a method of adapting the lattice parameter of a seed layer of a strained material, comprising the following successive steps: a) a structure is provided that has a seed layer of strained material, of lattice parameter A1, of nominal lattice parameter An and of thermal expansion coefficient CTE3, a low-viscosity layer and an intermediate substrate of thermal expansion coefficient CTE1; b) a heat treatment is applied so as to relax the seed layer of strained material; and c) the seed layer is transferred onto a support substrate of thermal expansion coefficient CTE5, the intermediate substrate and the support substrate being chosen so that A1<An and CTE1?CTE3 and CTE5>CTE1 or A1>An and CTE1?CTE3 and CTE5<CTE1.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: July 22, 2014
    Assignee: SOITEC
    Inventors: Pascal Guenard, Frederic Dupont
  • Patent number: 8581229
    Abstract: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. A transparent, conductive non-III-nitride material is disposed in direct contact with the n-type region. A total thickness of semiconductor material between the light emitting layer and the transparent, conductive non-III-nitride material is less than one micron.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: November 12, 2013
    Assignees: Koninklijke Philips N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Frederic Dupont, John E. Epler
  • Publication number: 20110294245
    Abstract: The invention relates to a method of adapting the lattice parameter of a seed layer of a strained material, comprising the following successive steps: a) a structure is provided that has a seed layer of strained material, of lattice parameter A1, of nominal lattice parameter An and of thermal expansion coefficient CTE3, a low-viscosity layer and an intermediate substrate of thermal expansion coefficient CTE1; b) a heat treatment is applied so as to relax the seed layer of strained material; and c) the seed layer is transferred onto a support substrate of thermal expansion coefficient CTE5, the intermediate substrate and the support substrate being chosen so that A1<An and CTE1?CTE3 and CTE5>CTE1 or A1>An and CTE1?CTE3 and CTE5<CTE1.
    Type: Application
    Filed: February 15, 2010
    Publication date: December 1, 2011
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Pascal Guenard, Frederic Dupont
  • Patent number: 7968909
    Abstract: Reconditioned donor substrates that include a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and an additional layer deposited upon the opposite surface of the remainder substrate to increase its thickness and to form the reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers and is typically made from gallium nitride donor substrates.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: June 28, 2011
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Frederic Dupont
  • Publication number: 20110049528
    Abstract: Reconditioned donor substrates that include a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and an additional layer deposited upon the opposite surface of the remainder substrate to increase its thickness and to form the reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers and is typically made from gallium nitride donor substrates.
    Type: Application
    Filed: November 4, 2010
    Publication date: March 3, 2011
    Inventor: Frederic Dupont
  • Patent number: 7851330
    Abstract: Methods are disclosed for preparing a reconditioned donor substrate by providing a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and depositing an additional layer onto the opposite surface of the remainder substrate to increase its thickness and to form a reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: December 14, 2010
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Frederic Dupont
  • Publication number: 20090191719
    Abstract: Methods are disclosed for preparing a reconditioned donor substrate by providing a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and depositing an additional layer onto the opposite surface of the remainder substrate to increase its thickness and to form a reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers.
    Type: Application
    Filed: March 31, 2009
    Publication date: July 30, 2009
    Inventor: Frederic Dupont
  • Patent number: 7531428
    Abstract: Methods for fabricating compound material wafers are described. An embodiment of the method includes providing a donor substrate having a surface, forming a weakened zone in the donor substrate to define a transfer layer that includes the donor substrate surface, bonding the surface of the transfer layer to a handle substrate, and detaching the donor substrate at the weakened zone to transfer the transfer layer onto the handle substrate. Consequently, a compound material wafer is formed, and the transfer layer detached donor wafer provides a remainder substrate having a surface where the transfer layer was detached. Next, an additional layer is deposited onto a surface of the remainder substrate to increase its thickness and to form a reconditioned substrate, and the reconditioned substrate is recycled as a donor substrate for fabricating additional compound material wafers.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: May 12, 2009
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Frederic Dupont
  • Publication number: 20080303113
    Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.
    Type: Application
    Filed: July 31, 2008
    Publication date: December 11, 2008
    Inventors: Frederic Dupont, Ian Cayrefourcq
  • Publication number: 20070022940
    Abstract: The present invention provides methods for fabricating a composite substrate including a supporting substrate and a layer of a binary or ternary material having a crystal form that is non-cubic and semi-polar or non-polar. The methods comprise transferring the layer of a binary or ternary material from a donor substrate to a receiving substrate.
    Type: Application
    Filed: September 28, 2006
    Publication date: February 1, 2007
    Inventors: Alice Boussagol, Frederic Dupont, Bruce Faure
  • Publication number: 20070018266
    Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.
    Type: Application
    Filed: August 24, 2006
    Publication date: January 25, 2007
    Inventors: Frederic Dupont, Ian Cayrefourcq
  • Publication number: 20060099776
    Abstract: Methods for fabricating compound material wafers are described. An embodiment of the method includes providing a donor substrate having a surface, forming a weakened zone in the donor substrate to define a transfer layer that includes the donor substrate surface, bonding the surface of the transfer layer to a handle substrate, and detaching the donor substrate at the weakened zone to transfer the transfer layer onto the handle substrate. Consequently, a compound material wafer is formed, and the transfer layer detached donor wafer provides a remainder substrate having a surface where the transfer layer was detached. Next, an additional layer is deposited onto a surface of the remainder substrate to increase its thickness and to form a reconditioned substrate, and the reconditioned substrate is recycled as a donor substrate for fabricating additional compound material wafers.
    Type: Application
    Filed: March 18, 2005
    Publication date: May 11, 2006
    Inventor: Frederic Dupont
  • Publication number: 20060088979
    Abstract: A method for fabricating a semiconductor structure having a high-strained crystalline layer with a low crystal defect density is disclosed. The structure includes a substrate having a first material comprising germanium or a Group(III)-Group(V)-semiconductor or alloy thereof. In addition, a crystalline epitaxial first layer, comprising a graded buffer layer and a substantially relaxed layer, is provided. The buffer layer is sufficiently relaxed to provide relaxation of the substantially relaxed layer deposited thereon. A further layer may be provided on the first layer, and the transfer of at least the further layer is facilitated by providing a weakened zone in the first layer.
    Type: Application
    Filed: November 17, 2005
    Publication date: April 27, 2006
    Inventors: Cecile Aulnette, Frederic Dupont, Carlos Mazure
  • Publication number: 20040150006
    Abstract: A semiconductor structure having a high-strained crystalline layer with a low crystal defect density and a method for fabricating such a semiconductor structure are disclosed. The structure includes a substrate having a first material comprising germanium or a Group (III)-Group (V)-semiconductor or alloy thereof. In addition, a crystalline epitaxial first layer, comprising a graded buffer layer and a substantially relaxed layer, is provided. The buffer layer is sufficiently relaxed to provide relaxation of the substantially relaxed layer deposited thereon. A further layer may be provided on the first layer, and the transfer of at least the further layer is facilitated by providing a weakened zone in the first layer.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 5, 2004
    Inventors: Cecile Aulnette, Frederic Dupont, Carlos Mazure
  • Publication number: 20040040907
    Abstract: This process is characterized in that it comprises the following steps:
    Type: Application
    Filed: March 27, 2003
    Publication date: March 4, 2004
    Inventors: Katia Wouters-Wasiak, Olivier Huber, Frederic Dupont, Daniel Demain