Patents by Inventor Frederic Giroud

Frederic Giroud has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stable low dropout voltage regulator
    Patent number: 8680829
    Abstract: A Low-dropout (LDO) voltage regulator (1) includes: —a Ballast Transistor PBaI (3) of the P-channel MOS or Bipolar type, having a gate (34) and a main conduction path (D-S) connected in a path between the input VDD (4) and the output VOUT (5) of the regulator—an Operational Transconductance Amplifier (OTA) (2) being implemented as an adaptative biasing transistor amplifier and having an inverting input coupled to the output VOUT (5) through a voltage divider R1-R2 (61), a non-inverting input coupled to a voltage reference circuit (7) and having an output connected to the gate (34) of the Ballast transistor (3). To stabilize the output (5) and to increase the power supply rejection ratio (PSRR) of the LDO voltage regulator (1), OTA (2) includes a resistance RS, which enables to stabilize the output (5) and to increase the Power Supply Rejection Ratio (PSRR).
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: March 25, 2014
    Assignee: CSEM Centre Suisse d'Electronique et de Microtechnique SA—Recherche et Developpement
    Inventor: Frederic Giroud
  • STABLE LOW DROPOUT VOLTAGE REGULATOR
    Publication number: 20110133707
    Abstract: A Low-dropout (LDO) voltage regulator (1) includes: —a Ballast Transistor PBaI (3) of the P-channel MOS or Bipolar type, having a gate (34) and a main conduction path (D-S) connected in a path between the input VDD (4) and the output VOUT (5) of the regulator—an Operational Transconductance Amplifier (OTA) (2) being implemented as an adaptative biasing transistor amplifier and having an inverting input coupled to the output VOUT (5) through a voltage divider R1-R2 (61), a non-inverting input coupled to a voltage reference circuit (7) and having an output connected to the gate (34) of the Ballast transistor (3). To stabilize the output (5) and to increase the power supply rejection ratio (PSRR) of the LDO voltage regulator (1), OTA (2) includes a resistance RS, which enables to stabilize the output (5) and to increase the Power Supply Rejection Ratio (PSRR).
    Type: Application
    Filed: August 5, 2009
    Publication date: June 9, 2011
    Inventor: Frederic Giroud