Patents by Inventor Frederic Greus

Frederic Greus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Writing data and resilience bits to register memory
    Patent number: 12724708
    Abstract: In an electronic system, data is written to a write address in register memory. Chunks of the data are decomposed into a plurality of data sub-granules. Bits of the write address are distributed to the data sub-granules. An address sub-granule is created for any bits of the write address that were not distributed to the data sub-granules. A resilience algorithm is used to compute resilience bits for each of the sub-granules. The chunks and the resilience bits are written to the register memory.
    Type: Grant
    Filed: March 30, 2025
    Date of Patent: September 1, 2026
    Assignee: ARTERIS, INC.
    Inventors: Xavier Van Ruymbeke, Michael Moriaud, Frederic Greus, Sylvain Meliciani
  • SYSTEM AND METHOD FOR USING INTERFACE PROTECTION PARAMETERS
    Publication number: 20250315584
    Abstract: A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.
    Type: Application
    Filed: June 23, 2025
    Publication date: October 9, 2025
    Applicant: ARTERIS, INC.
    Inventors: John Coddington, Sylvain MELICIANI, Frederic GREUS, Xavier Van RUYMBEKE
  • System and method for using interface protection parameters
    Patent number: 12340156
    Abstract: A system and method for generation of a hardware description for adding interface protection scheme to an electronic design. The electronic design and interface protection scheme are defined as parameters. An interface protection model includes interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description module uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding.
    Type: Grant
    Filed: December 13, 2023
    Date of Patent: June 24, 2025
    Assignee: ARTERIS, INC.
    Inventors: John Coddington, Sylvain Meliciani, Frederic Greus, Xavier Van Ruymbeke
  • SYSTEM AND METHOD FOR USING INTERFACE PROTECTION PARAMETERS
    Publication number: 20240160822
    Abstract: A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.
    Type: Application
    Filed: December 13, 2023
    Publication date: May 16, 2024
    Applicant: ARTERIS, INC.
    Inventors: John Coddington, Sylvain MELICIANI, Frederic GREUS, Xavier Van RUYMBEKE
  • System and method for using interface protection parameters
    Patent number: 11847394
    Abstract: A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: December 19, 2023
    Assignee: Arteris, Inc.
    Inventors: John Coddington, Sylvain Meliciani, Frederic Greus, Xavier Van Ruymbeke
  • SYSTEM AND METHOD FOR USING INTERFACE PROTECTION PARAMETERS
    Publication number: 20220180034
    Abstract: A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.
    Type: Application
    Filed: December 2, 2021
    Publication date: June 9, 2022
    Applicant: Arteris, Inc.
    Inventors: John CODDINGTON, Sylvain MELICIANI, Frederic GREUS, Xavier Van RUYMBEKE
  • System and method for interface protection
    Patent number: 11210445
    Abstract: A system and method for adding interface protection to an electronic design using parameters. The electronic design and interface protection scheme are defined as parameters. An interface protection model creates interface protection implementation parameters that describe the implementation details of the interface protection. A hardware description model uses the electronic design parameters and the interface protection implementation parameters to create a hardware description. The interface protection scheme can be a built-in protection scheme, a user defined scheme, a scheme that includes place holders that the user may define later, and a combination of the preceding. The interface protection scheme may contain components to help with the retiming of the description of hardware.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: December 28, 2021
    Assignee: ARTERIS, INC.
    Inventors: John Coddington, Sylvain Meliciani, Frederic Greus, Xavier Van Ruymbeke