Abstract: Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.

Abstract: Non-Volatile Memory (NVM) cells include a selection circuit for providing an output based on selecting between an input data signal and an output of a Multiple Time Programmable (MTP) NVM element. The input data signal may be latched by a latch circuit such as a flip-flop first. The selector circuit's output is used to confirm the programming values for the MTP NVM element such that the element can be programmed correctly without losing time by reading the programmed MTP NVM element or reprogramming a misprogrammed element.

Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate having a first semiconductive body and a second plate having a floating electrode. The first and second semiconductive bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.

Abstract: Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.

Abstract: A nonvolatile memory cell is constructed using a floating-gate (FG) pFET Readout Transistor (RT) having its source tied to a power source (Vdd) and its drain providing a current which can be sensed to determine a cell state. The gate of the RT provides for charge/information storage. A control capacitor structure (CCS) having terminals coupled to a first voltage source and the FG and a tunneling capacitor structure (TCS) having terminals coupled to a second voltage source and the FG are utilized in each embodiment. The CCS has much more capacitance than the TCS. Manipulation of the voltages applied to the first voltage source and second voltage source (and Vdd) controls an electric field across the CCS and pFET dielectrics and thus Fowler-Nordheim tunneling of electrons onto and off of the FG, thus controlling the charge on the FG and the information stored thereon.

Abstract: Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.

Abstract: Circuits are provided for high-voltage switching in single-well CMOS processes.

Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate comprising a first semiconductive body and a second plate comprising a floating electrode. The first and second semiconductive bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.

Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate having a first semiconductive body and a second plate having a floating electrode. The first and second semiconductive bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.

Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate comprising a first semiconductive body and a second plate comprising a floating electrode. The first and second semiconductor bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.

Abstract: A bandgap voltage reference circuit that utilize a two-stage transconductance amplifier as a feedback control loop to improve the accuracy and stability of the output reference voltage without the need for an additional biasing circuit. The high gain provides a good power-supply rejection ratio, and improves the circuit performance. The amplifier does not require a biasing circuit, thus saving valuable chip space. Furthermore, eliminating the need for a biasing circuit reduces the power consumption of the circuit.

Abstract: A bandgap voltage reference circuit that utilize a two-stage transconductance amplifier as a feedback control loop to improve the accuracy and stability of the output reference voltage without the need for an additional biasing circuit. The high gain provides a good power-supply rejection ratio, and improves the circuit performance. The amplifier does not require a biasing circuit, thus saving valuable chip space. Furthermore, eliminating the need for a biasing circuit reduces the power consumption of the circuit.