Patents by Inventor Frederic J. Bernard

Frederic J. Bernard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MTP NVM elements by-passed for programming
    Patent number: 7289358
    Abstract: Non-Volatile Memory (NVM) cells include a selection circuit for providing an output based on selecting between an input data signal and an output of a Multiple Time Programmable (MTP) NVM element. The input data signal may be latched by a latch circuit such as a flip-flop first. The selector circuit's output is used to confirm the programming values for the MTP NVM element such that the element can be programmed correctly without losing time by reading the programmed MTP NVM element or reprogramming a misprogrammed element.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: October 30, 2007
    Assignee: Impinj, Inc.
    Inventors: Alberto Pesavento, Troy N. Gilliland, Frederic J. Bernard
  • High-voltage CMOS-compatible capacitors
    Patent number: 7262092
    Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate having a first semiconductive body and a second plate having a floating electrode. The first and second semiconductive bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: August 28, 2007
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Frederic J. Bernard
  • High-voltage CMOS-compatible capacitors
    Patent number: 7071507
    Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate comprising a first semiconductive body and a second plate comprising a floating electrode. The first and second semiconductive bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: July 4, 2006
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Frederic J. Bernard
  • High-voltage CMOS-compatible capacitors
    Patent number: 7042701
    Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate having a first semiconductive body and a second plate having a floating electrode. The first and second semiconductive bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: May 9, 2006
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Frederic J. Bernard
  • High-voltage CMOS-compatible capacitors
    Patent number: 6842327
    Abstract: A high-voltage stacked capacitor includes a first capacitor and a second capacitor. Each capacitor includes a first plate comprising a first semiconductive body and a second plate comprising a floating electrode. The first and second semiconductor bodies are electrically isolated from each other. The floating electrode includes an intercapacitor node configured to self-adjust to a value less than a working voltage impressed on the stacked capacitor.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: January 11, 2005
    Assignee: Impinj, Inc.
    Inventors: Christopher J. Diorio, Frederic J. Bernard
  • Low power bandgap voltage reference circuit
    Patent number: 6774711
    Abstract: A bandgap voltage reference circuit that utilize a two-stage transconductance amplifier as a feedback control loop to improve the accuracy and stability of the output reference voltage without the need for an additional biasing circuit. The high gain provides a good power-supply rejection ratio, and improves the circuit performance. The amplifier does not require a biasing circuit, thus saving valuable chip space. Furthermore, eliminating the need for a biasing circuit reduces the power consumption of the circuit.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: August 10, 2004
    Assignee: Atmel Corporation
    Inventor: Frederic J. Bernard
  • Low power bandgap voltage reference circuit
    Publication number: 20040095186
    Abstract: A bandgap voltage reference circuit that utilize a two-stage transconductance amplifier as a feedback control loop to improve the accuracy and stability of the output reference voltage without the need for an additional biasing circuit. The high gain provides a good power-supply rejection ratio, and improves the circuit performance. The amplifier does not require a biasing circuit, thus saving valuable chip space. Furthermore, eliminating the need for a biasing circuit reduces the power consumption of the circuit.
    Type: Application
    Filed: November 15, 2002
    Publication date: May 20, 2004
    Inventor: Frederic J. Bernard