Abstract: The invention relates to an image sensor specially adapted to vision in low-light conditions (notably night vision).The sensor is formed on an integrated circuit chip starting from a silicon substrate. It comprises: a matrix of rows and columns of active pixels each comprising at least one photodiode and transistors, control circuits for the matrix, external to the matrix, and signal read circuits, external to the matrix. The photodiodes of the sensor are formed within an active layer of single-crystal silicon whose resistivity is at least 500 ohms·cm if this active layer is an epitaxial layer grown on the silicon substrate and at least 2000 ohms·cm if this active layer consists of the upper part of the silicon substrate.

Abstract: The invention relates to time-delay and signal-integration linear image sensors (or TDI sensors). According to the invention, a pixel comprises a succession of several insulated gates covering a semiconducting layer, the gates of one pixel being separated from one another and separated from the gates of an adjacent pixel of another line by narrow uncovered gaps of a gate and comprising a doped region of a second type of conductivity covered by a doped superficial region of the first type; the superficial regions are kept at one and the same reference potential; the width of the narrow gaps between adjacent gates is such that the internal potential of the region of the second type is modified in the whole width of the narrow gap when a gate sustains the alternations of potential necessary for the transfer of charges from one pixel to the following one.

Abstract: A field effect transistor including: a support layer, a plurality of active zones based on a semiconductor, each active zone configured to form a channel and arranged between two gates adjacent to each other and consecutive, the active zones and the gates being arranged on the support layer, each gate including a first face on the side of the support layer and a second face opposite the first face. The second face of a first of the two gates is electrically connected to a first electrical contact made on the second face of the first of the two gates, and the first face of a second of the two gates is electrically connected to a second electrical contact passing through the support layer. The gates of the transistor are not electrically connected to each other.

Abstract: The invention relates to image sensors, more particularly but not exclusively to scanning sensors with signal integration (or TDI sensors, for ‘Time Delay Integration linear sensors’). The adjacent pixels along a column each comprise an alternation of at least one photodiode and one storage gate adjacent to the photodiode. The gates comprise a main body and, on the upstream side in the direction of the transfer of the charges but not on the downstream side, a series of narrow fingers extending from the main body toward the upstream side, the ends of the fingers on the upstream side being adjacent to a photodiode situated upstream of the gate, the narrow fingers being separated from one another by doped isolating regions of the first type of conductivity, with a higher doping and preferably deeper than the surface regions, connected, as they are, to the reference potential of the active layer, these isolating regions being interposed between the main body of the gate and the photodiode.

Abstract: The invention relates to linear time-delay and integration sensors (or TDI sensors). According to the invention, adjacent pixels of the same rank comprise, alternately, at least one photodiode and one transfer gate adjacent to the photodiode, the photodiodes comprising a common reference region of a first conductivity type, in which an individual region of opposite conductivity type is formed, itself covered by a individual surface region of the first conductivity type, characterized in that the surface regions of two photodiodes located on either side of a transfer gate are electrically separated so as to be able to be brought to different potentials in order to create potential wells and potential barriers allowing accumulation and transfer of charges as desired.

Abstract: The invention relates to scanning linear image sensors with signal integration, in which an image of a line of points from an observed scene is reconstructed by the addition of successive images taken by a plurality of photosensitive lines which successively observe the same line of the scene as the scene moves across the sensor perpendicularly to the lines. The sensor according to the invention uses charge transfer pixels (Pm,i,j) grouped into M groups of N lines; an analog charge summation is carried out in each group; and the results of this summation are read by read circuits (READm) associated with each group, and then digitized and added to those of the other groups.

Abstract: A image sensor includes active pixels for gathering images at very high and very low luminance level. Each pixel includes at least one photodiode, a charge storage node, an electron multiplication amplification structure, a unit for transferring electrons from the photodiode to the structure, a unit for transferring electrons from the amplification structure to the storage node after multiplication, a transistor for reinitializing the potential of the storage node. The pixels are read by a reading circuit which samples the potential of the charge storage node after reinitialization and after transfer of the electrons into the storage node and which provides a corresponding illumination measurement. The sensor furthermore includes a unit for carrying out the integration of charge in two different durations in the course of one and the same frame, and for giving the amplification structure multiplication factors different to the charge integrated in the course of these durations.

Abstract: The invention relates to image sensors and more particularly those which are intended to capture images at low luminance levels. An active-pixel image sensor is provided, each pixel comprising, on the surface of a semiconductor active layer, a photodiode region adjacent a transfer gate itself adjacent a charge storage region, the transfer gate permitting, when it receives a transfer pulse, the transfer of charge from the photodiode region to the storage region. The photodiode region is adjacent an accelerating gate isolated from the semiconductor active layer. Switching means are provided so as to apply to the accelerating gate, during an integration phase preceding the transfer pulse, a series of high-potential/low-potential alternations inducing an electric field alternately in one direction and in the other direction between the photodiode region and the active layer region located beneath the accelerating gate.

Abstract: The invention relates to image sensors, more particularly but not exclusively to scanning sensors with signal integration (or TDI sensors, for ‘Time Delay Integration linear sensors’). The adjacent pixels along a column each comprise an alternation of at least one photodiode and one storage gate adjacent to the photodiode. The gates comprise a main body and, on the upstream side in the direction of the transfer of the charges but not on the downstream side, a series of narrow fingers extending from the main body toward the upstream side, the ends of the fingers on the upstream side being adjacent to a photodiode situated upstream of the gate, the narrow fingers being separated from one another by doped insulating regions of the first type of conductivity, with a higher doping and preferably deeper than the surface regions, connected, as they are, to the reference potential of the active layer, these insulating regions being interposed between the main body of the gate and the photodiode.

Abstract: The invention relates to scanning linear image sensors with signal integration, in which an image of a line of points from an observed scene is reconstructed by the addition of successive images taken by a plurality of photosensitive lines which successively observe the same line of the scene as the scene moves across the sensor perpendicularly to the lines. The sensor according to the invention uses charge transfer pixels (Pm,i,j) grouped into M groups of N lines; an analog charge summation is carried out in each group; and the results of this summation are read by read circuits (READm) associated with each group, and then digitized and added to those of the other groups.

Abstract: The invention relates to linear time-delay and integration sensors (or TDI sensors). According to the invention, adjacent pixels of the same rank comprise, alternately, at least one photodiode and one transfer gate adjacent to the photodiode, the photodiodes comprising a common reference region of a first conductivity type, in which an individual region of opposite conductivity type is formed, itself covered by a individual surface region of the first conductivity type, characterized in that the surface regions of two photodiodes located on either side of a transfer gate are electrically separated so as to be able to be brought to different potentials in order to create potential wells and potential barriers allowing accumulation and transfer of charges as desired.

Abstract: The invention relates to time-delay and signal-integration linear image sensors (or TDI sensors). According to the invention, a pixel comprises a succession of several insulated gates covering a semiconducting layer, the gates of one pixel being separated from one another and separated from the gates of an adjacent pixel of another line by narrow uncovered gaps of a gate and comprising a doped region of a second type of conductivity covered by a doped superficial region of the first type; the superficial regions are kept at one and the same reference potential; the width of the narrow gaps between adjacent gates is such that the internal potential of the region of the second type is modified in the whole width of the narrow gap when a gate sustains the alternations of potential necessary for the transfer of charges from one pixel to the following one.

Abstract: A field effect transistor including: a support layer, a plurality of active zones based on a semiconductor, each active zone configured to form a channel and arranged between two gates adjacent to each other and consecutive, the active zones and the gates being arranged on the support layer, each gate including a first face on the side of the support layer and a second face opposite the first face. The second face of a first of the two gates is electrically connected to a first electrical contact made on the second face of the first of the two gates, and the first face of a second of the two gates is electrically connected to a second electrical contact passing through the support layer. The gates of the transistor are not electrically connected to each other.

Abstract: Method of producing a transistor, comprising in particular the steps of: producing a first etching mask on a gate layer, one edge of the first mask forming a pattern of the first edge of a gate of the transistor, etching the gate layer according to the first etching mask, first ion implantation in a part of the substrate not covered by the gate layer, trimming the first etching mask over a length equal to a gate length of the transistor, producing a second etching mask on the gate layer, removing the first etching mask etching the gate layer according to the second etching mask, second ion implantation in another part of the substrate.

Abstract: Method of producing a transistor, comprising in particular the steps of: producing a first etching mask on a gate layer, one edge of the first mask forming a pattern of the first edge of a gate of the transistor, etching the gate layer according to the first etching mask, first ion implantation in a part of the substrate not covered by the gate layer, trimming the first etching mask over a length equal to a gate length of the transistor, producing a second etching mask on the gate layer, removing the first etching mask etching the gate layer according to the second etching mask, second ion implantation in another part of the substrate.