Patents by Inventor Frederic Mazen
Frederic Mazen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12327719Abstract: A method of polishing a semiconductor substrate, including: a) a step of multiple implantations of ions from an upper surface of the substrate, to modify the material of an upper portion of the substrate, the multiple implantation step comprising a plurality of successive implantations under different respective implantation orientations; and b) a step of selective removal of the upper portion of the substrate.Type: GrantFiled: November 18, 2021Date of Patent: June 10, 2025Assignee: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Shay Reboh, Jean-Michel Hartmann, Frederic Mazen, Frédéric Milesi
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Publication number: 20220157612Abstract: A method of polishing a semiconductor substrate, including: a) a step of multiple implantations of ions from an upper surface of the substrate, to modify the material of an upper portion of the substrate, the multiple implantation step comprising a plurality of successive implantations under different respective implantation orientations; and b) a step of selective removal of the upper portion of the substrate.Type: ApplicationFiled: November 18, 2021Publication date: May 19, 2022Applicant: Commissariat à I'Ènergie Atomique et aux Ènergies AlternativesInventors: Shay Reboh, Jean-Michel Hartmann, Frederic Mazen, Frédéric Milesi
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Patent number: 11056340Abstract: A process for attaching a first substrate to a second substrate by direct bonding includes the successive steps of: a) providing the first and second substrates, each comprising a first surface and an opposite second surface, b) bonding the first substrate to the second substrate by direct bonding between the first surfaces of the first and second substrates, step b) being carried out under a first gaseous atmosphere having a first relative humidity level denoted by ?1, and c) applying a thermal annealing treatment to the bonded first and second substrates at a thermal annealing temperature of between 20° C. and 700° C., step c) being carried out under a second gaseous atmosphere having a second humidity level denoted by ?2, satisfying ?2??1.Type: GrantFiled: December 3, 2018Date of Patent: July 6, 2021Assignee: Commissariat a l'energie atomique et aux energies alternativesInventors: Frank Fournel, Frederic Mazen
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Patent number: 10950491Abstract: A useful layer is layered onto a support by a method that includes the steps of forming an embrittlement plane by implanting light elements into a first substrate, so as to form a useful layer between such plane and one surface of the first substrate; applying the support onto the surface of the first substrate so as to form an assembly to be fractured; applying a heat treatment for embrittling the assembly to be fractured; and initiating and propagating a fracture wave into the first substrate along the embrittlement plane. The fracture wave is initiated in a central area of the embrittlement plane and the propagation speed of the wave is controlled so that the velocity thereof is sufficient to cause the interactions of the fracture wave with acoustic vibrations emitted upon the initiation and/or propagation thereof, if any, are confined to a peripheral area of the useful layer.Type: GrantFiled: August 1, 2017Date of Patent: March 16, 2021Assignees: Soitec, COMMISSARIAT Á L'ÈNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVESInventors: Didier Landru, Nadia Ben Mohamed, Oleg Kononchuk, Frederic Mazen, Damien Massy, Shay Reboh, Francois Rieutord
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Publication number: 20190221471Abstract: A useful layer is layered onto a support by a method that includes the steps of forming an embrittlement plane by implanting light elements into a first substrate, so as to form a useful layer between such plane and one surface of the first substrate; applying the support onto the surface of the first substrate so as to form an assembly to be fractured; applying a heat treatment for embrittling the assembly to be fractured; and initiating and propagating a fracture wave into the first substrate along the embrittlement plane. The fracture wave is initiated in a central area of the embrittlement plane and the propagation speed of the wave is controlled so that the velocity thereof is sufficient to cause the interactions of the fracture wave with acoustic vibrations emitted upon the initiation and/or propagation thereof, if any, are confined to a peripheral area of the useful layer.Type: ApplicationFiled: August 1, 2017Publication date: July 18, 2019Applicants: Commissariat A L'Energie Atomique et aux Energies Alternatives, Soitec, SoitecInventors: Didier Landru, Nadia Ben Mohamed, Oleg Kononchuk, Frederic Mazen, Damien Massy, Shay Reboh, Francois Rieutord
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Publication number: 20190214258Abstract: A process for attaching a first substrate to a second substrate by direct bonding includes the successive steps of: a) providing the first and second substrates, each comprising a first surface and an opposite second surface, b) bonding the first substrate to the second substrate by direct bonding between the first surfaces of the first and second substrates, step b) being carried out under a first gaseous atmosphere having a first relative humidity level denoted by ?1, and c) applying a thermal annealing treatment to the bonded first and second substrates at a thermal annealing temperature of between 20° C. and 700° C., step c) being carried out under a second gaseous atmosphere having a second humidity level denoted by ?2, satisfying ?2??1.Type: ApplicationFiled: December 3, 2018Publication date: July 11, 2019Applicant: Commissariat a l'energie atomique et aux energies alternativesInventors: Frank FOURNEL, Frederic Mazen
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Publication number: 20180315644Abstract: The invention relates to a method of treating a thin film transferred from a donor substrate to a receiver substrate by fracture at the level of a zone of the donor substrate which is made fragile by hydrogen ion implantation. The method includes a step of thinning the transferred thin film so as to eliminate a region of residual defects induced by the hydrogen ion implantation. The method also includes, directly after the fracture and before the step of thinning of the transferred thin film, a step of forming a hydrogen trapping layer in the region of residual defects of the transferred thin film. A thermal processing may be implemented after formation of the hydrogen trapping layer and before thinning of the thin film.Type: ApplicationFiled: October 28, 2016Publication date: November 1, 2018Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Aurelie TAUZIN, Emmanuelle LAGOUTTE, Frederic MAZEN, Flavia PIEGAS LUCE, Shay REBOH
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Patent number: 9966453Abstract: Method including the steps consisting in: forming source and drain semiconductor blocks comprising a first layer based on a first crystalline semiconductor material surmounted by a second layer (16) based on a second crystalline semiconductor material different from the first semiconductor material, making amorphous and selectively doping the second layer (16) by means of one or more implantation(s), carrying out a recrystallisation of the second layer and an activation of dopants by means of at least one thermal annealing.Type: GrantFiled: April 6, 2016Date of Patent: May 8, 2018Assignee: Commissariat à l'énergie atomique et aux énergies alternativesInventors: Shay Reboh, Perrine Batude, Frederic Mazen, Benoit Sklenard
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Patent number: 9761607Abstract: A method for producing a microelectronic device is provided, including forming on an insulating layer of a semi-conductor on insulator type substrate, a first semi-conductor block covered with a first strain zone configured to induce a compressive strain in the first block and a second semi-conductor block covered with a second strain zone configured to induce a tensile strain in the second block, the first block and the second block each being formed of a lower region based on amorphous semi-conductor material, covered with an upper region of crystalline semi-conductor material in contact with one of the strain zones; and recrystallizing the lower region of the first and second blocks while using the upper region of crystalline material as starting zone for a recrystallization front.Type: GrantFiled: December 22, 2014Date of Patent: September 12, 2017Assignee: Commissariat à l'énergie atomique et aux énergies alternativesInventors: Shay Reboh, Perrine Batude, Sylvain Maitrejean, Frederic Mazen
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Patent number: 9589830Abstract: A method for transferring a useful layer onto a support includes the following processes: formation of a fragilization plane through the implantation of light species into a first substrate in such a way as to form a useful layer between this plane and a surface of the first substrate; application of the support onto the surface of the first substrate to form an assembly to be fractured having two exposed sides; thermal fragilization treatment of the assembly to be fractured; and initiation and self-sustained propagation of a fracture wave in the first substrate along the fragilization plane. At least one of the sides of the assembly to be fractured is in close contact, over a contact zone, with an absorbent element suitable for capturing and dissipating acoustic vibrations emitted during the initiation and/or propagation of the fracture wave.Type: GrantFiled: April 14, 2015Date of Patent: March 7, 2017Assignees: Soitec, Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Didier Landru, Oleg Kononchuk, Nadia Ben Mohamed, Damien Massy, Frederic Mazen, Francois Rieutord
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Publication number: 20160300927Abstract: Method including the steps consisting in: forming source and drain semiconductor blocks comprising a first layer based on a first crystalline semiconductor material surmounted by a second layer (16) based on a second crystalline semiconductor material different from the first semiconductor material, making amorphous and selectively doping the second layer (16) by means of one or more implantation(s), carrying out a recrystallisation of the second layer and an activation of dopants by means of at least one thermal annealing.Type: ApplicationFiled: April 6, 2016Publication date: October 13, 2016Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Shay REBOH, Perrine BATUDE, Frederic MAZEN, Benoit SKLENARD
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Patent number: 9427948Abstract: A method for manufacturing a flexible structure including implanting ionic species in first and second source substrates so as to form first and second embrittlement regions respectively, delimiting first and second thin films, providing a flexible substrate, the stiffness R of which is less than or equal to 107 GPa·?m3, securing the first and second thin films to the first and second faces of the flexible substrate respectively so as to form a stack including the flexible structure delimited by the first and second embrittlement regions, the flexible structure having a stiffening effect suitable for allowing transfers of the first and second thin films, and applying a thermal budget so as to transfer the first and second thin films onto the flexible substrate.Type: GrantFiled: December 18, 2012Date of Patent: August 30, 2016Assignee: COMMISSARIATE A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Hubert Moriceau, Maxime Argoud, Frank Fournel, Frederic Mazen, Christophe Morales
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Patent number: 9343375Abstract: Method of manufacturing a transistor on a layer made of a first crystalline semiconducting material to make a channel, deposited on a dielectric layer, the method including the following steps: epitaxial growth of zones made of a second semiconducting material on the layer made of a first crystalline semiconducting material, so as to form source and drain blocks with the layer made of a first crystalline semiconducting material on each side of the channel, the second semiconducting material having a lattice parameter different from that of the first semiconducting material, in-depth amorphization of part of zones made of a second semiconducting material so as to keep only one layer of second crystalline semiconducting material on the surface of the source and drain blocks, and amorphization of zones of the layer made of a first semiconducting material located under zones made of a second semiconducting material, recrystallization of the source and drain blocks such that the second semiconducting material iType: GrantFiled: July 17, 2015Date of Patent: May 17, 2016Assignee: Commissariat à l'énergie atomique et aux énergies alternativesInventors: Perrine Batude, Frederic Mazen, Shay Reboh, Benoit Sklenard
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Patent number: 9246006Abstract: A method for manufacturing a transistor is provided, including amorphization and doping, by one or more localized implantations, of given regions of source and drain blocks based on crystalline semi-conductor material disposed on an insulating layer of a semi-conductor on insulator substrate, the implantations being carried out so as to conserve at a surface of said blocks zones of crystalline semi-conductor material on regions of amorphous semi-conductor material; and recrystallization of at least one portion of said given regions.Type: GrantFiled: August 7, 2014Date of Patent: January 26, 2016Assignees: Commissariat à l'énergie atomique et aux énergies alternatives, STMICROELECTRONICS SAInventors: Perrine Batude, Frederic Mazen, Benoit Sklenard, Shay Reboh
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Publication number: 20160020153Abstract: Method of manufacturing a transistor on a layer made of a first crystalline semiconducting material to make a channel, deposited on a dielectric layer, the method including the following steps: epitaxial growth of zones made of a second semiconducting material on the layer made of a first crystalline semiconducting material, so as to form source and drain blocks with the layer made of a first crystalline semiconducting material on each side of the channel, the second semiconducting material having a lattice parameter different from that of the first semiconducting material, in-depth amorphisation of part of zones made of a second semiconducting material so as to keep only one layer of second crystalline semiconducting material on the surface of the source and drain blocks, and amorphisation of zones of the layer made of a first semiconducting material located under zones made of a second semiconducting material, recrystallisation of the source and drain blocks such that the second semiconducting material iType: ApplicationFiled: July 17, 2015Publication date: January 21, 2016Applicant: Commissariat a L'Energie Atomique et aux Energies AlternativesInventors: Perrine BATUDE, Frederic MAZEN, Shay REBOH, Benoit SKLENARD
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Publication number: 20150303098Abstract: A method for transferring a useful layer onto a support includes the following processes: formation of a fragilization plane through the implantation of light species into a first substrate in such a way as to form a useful layer between this plane and a surface of the first substrate; application of the support onto the surface of the first substrate to form an assembly to be fractured having two exposed sides; thermal fragilization treatment of the assembly to be fractured; and initiation and self-sustained propagation of a fracture wave in the first substrate along the fragilization plane. At least one of the sides of the assembly to be fractured is in close contact, over a contact zone, with an absorbent element suitable for capturing and dissipating acoustic vibrations emitted during the initiation and/or propagation of the fracture wave.Type: ApplicationFiled: April 14, 2015Publication date: October 22, 2015Inventors: Didier Landru, Oleg Kononchuk, Nadia Ben Mohamed, Damien Massy, Frederic Mazen, Francois Rieutord
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Patent number: 9105688Abstract: A process for forming a layer (26) of semiconductor material from a substrate (20), or donor substrate, made of the same semiconductor material is described, comprising: formation in said donor substrate of a high lithium concentration zone (22), with a concentration between 5×1018 atoms/cm3 and 5×1020 atoms/cm3, then a hydrogen implantation (24) in the donor substrate, in, or in the vicinity of, the high lithium concentration zone, application of a stiffener (19) with the donor substrate, application of a thermal budget to result in the detachment of the layer (34) defined by the implantation.Type: GrantFiled: April 27, 2012Date of Patent: August 11, 2015Assignee: Commissariat a l'energie atomique et aux energies alternativesInventors: Aurelie Tauzin, Frederic Mazen
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Publication number: 20150179665Abstract: Method for producing a microelectronic device comprising: a) the formation on an insulating layer of a semi-conductor on insulator type substrate, a first semi-conductor block covered with a first strain zone adapted to induce a compressive strain in said first block and a second semi-conductor block covered with a second strain zone adapted to induce a tensile strain in said second block, the first block and the second block each being formed of a lower region based on amorphous semi-conductor material, covered with an upper region of crystalline semi-conductor material in contact with one of said strain zones, b) the re-crystallization of said lower region of said first block and of said second block while using said upper region of crystalline material as starting zone for a recrystallization front.Type: ApplicationFiled: December 22, 2014Publication date: June 25, 2015Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALTInventors: Shay REBOH, Perrine BATUDE, Sylvain MAITREJEAN, Frederic MAZEN
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Publication number: 20150044828Abstract: A Method for manufacturing a transistor comprising: a) amorphization and doping, by means of one or more localised implantation(s), of given regions of source and drain blocks based on crystalline semi-conductor material lying on an insulating layer of a semi-conductor on insulator substrate, the implantation(s) being carried out so as to conserve at the surface of said blocks zones of crystalline semi-conductor material on the regions of amorphous semi-conductor material, b) recrystallization of at least one portion of said given regions.Type: ApplicationFiled: August 7, 2014Publication date: February 12, 2015Applicants: COMMISARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT, STMICROELECTRONICS SAInventors: Perrine BATUDE, Frederic Mazen, Benoit Sklenard
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Publication number: 20140113434Abstract: A process for forming a layer (26) of semiconductor material from a substrate (20), or donor substrate, made of the same semiconductor material is described, comprising: formation in said donor substrate of a high lithium concentration zone (22), with a concentration between 5×1018 atoms/cm3 and 5×1020 atoms/cm3, then a hydrogen implantation (24) in the donor substrate, in, or in the vicinity of, the high lithium concentration zone, application of a stiffener (19) with the donor substrate, application of a thermal budget to result in the detachment of the layer (34) defined by the implantation.Type: ApplicationFiled: April 27, 2012Publication date: April 24, 2014Applicant: Commissariat a l'energie atomique et aux ene altInventors: Aurelie Tauzin, Frederic Mazen