Patents by Inventor Frederic T. Chong

Frederic T. Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240378085
    Abstract: A quantum computing system providing quantum processing as a service includes a quantum computing device and a server including at least one classical processor. The server is configured to: create a first job queue that includes a plurality of jobs configured to be executed on the first quantum computing device; receive, from a client device, a request for execution of a quantum program; add a first job entry to the first job queue for the request, the first job entry includes a quantum circuit for a first job; perform an optimization process on the quantum circuit of the first job; transmit the updated quantum circuit to the first quantum computing device for execution by the first quantum computing device using the plurality of qubits; receive, from the quantum computing device, execution results from the execution of the updated quantum circuit; and transmit the execution results to the client device.
    Type: Application
    Filed: April 13, 2022
    Publication date: November 14, 2024
    Inventors: Gokul Subramanian Ravi, Frederic T. Chong, Pranav Gokhale, Kaitlin N. Smith
  • Publication number: 20240370753
    Abstract: Sense+compute (S+C) quantum-state carriers (QSCs), e.g., rubidium atoms, can be used provide more scalable quantum sensor systems. Multiple S+C QSCs can capture sensor data. The sensor data can then be transformed in the quantum domain according to a quantum tomographic protocol. The transformed data can be measured to provide a respective classical domain measurement. The sensing, transformation, and measurement can be repeated to provide a set of measurements (corresponding to different transformations) that can be combined according to the quantum tomography protocol to generate a model of the original quantum state. Estimation error associated with the model can be scaled down at a rate corresponding more closely to increases in the number N of QSCs than ?{square root over (N)}, even in the presence of noise.
    Type: Application
    Filed: June 2, 2023
    Publication date: November 7, 2024
    Inventors: Michael A. Perlin, Pranav Gokhale, Frederic T. Chong, Mark Saffman, Dana Zachary Anderson
  • Publication number: 20240211788
    Abstract: A quantum-hardened power grid includes grid nodes (e.g., power plants, renewable energy sources and substations) and transmission lines connecting the grid nodes. The grid nodes include stable quantum clocks that permit the power grid to continue operation in the event of downtime for a GPS or other external synchronization reference. Operation sans an external reference can be extended by synchronizing atomic clocks across grid nodes using a quantum network. The atomic clocks can be used with quantum sensors and quantum computers to provide grid state estimates, e.g., using quantum tomography “at the edge”. In addition, these quantum devices can be used to compute responses to grid faults and cyberattacks.
    Type: Application
    Filed: December 20, 2023
    Publication date: June 27, 2024
    Inventors: Pranav Gokhale, Michael A. Perlin, Palash Goiporia, Frederic T. Chong, William Clark
  • Publication number: 20240211791
    Abstract: A quantum computing system for optimizing instructions of a quantum circuit is configured to: select reference points in a parameter space of a family of gates that are executable by the quantum processor; identify edges in the parameter space connecting two reference points; compute a pulse vector for each reference point of the plurality of reference points; optimize the pulse vector for each reference point of the plurality of reference points based on the first pulse vector of each neighboring reference point connected to that reference point by an edge; receive a target operation from the quantum circuit for optimization; compute a second pulse vector for the target operation based on interpolating between a subset of reference points of the plurality of reference points; and executed the target operation on a quantum processor using the pulse vector for the target operation.
    Type: Application
    Filed: March 23, 2023
    Publication date: June 27, 2024
    Inventors: Frederic T. Chong, Jason Chadwick
  • Patent number: 11886379
    Abstract: A computing system includes a quantum processor with qubits, a classical memory including a quantum program defining a plurality of instructions in a source language, and a classical processor configured to: (i) receive a circuit of gates representing a quantum program for a variational algorithm in which computation is interleaved with compilation; (ii) identify a plurality of blocks, each block includes a subcircuit of gates, leaving one or more remainder subcircuits of the circuit of gates outside of the plurality of blocks; (iii) pre-compile each block of the plurality of blocks with a pulse generation program to generate a plurality of pre-compiled blocks including control pulses configured to perform the associated block on the quantum processor; and (iv) iteratively execute the quantum program using the pre-compiled blocks as static during runtime and recompiling the one or more remainder subcircuits on the classical processor at each iteration of execution.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 30, 2024
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Pranav Gokhale, Yongshan Ding, Thomas Propson, Frederic T. Chong
  • Publication number: 20220374390
    Abstract: A computing system includes a quantum processor with qubits, a classical memory including a quantum program defining a plurality of instructions in a source language, and a classical processor configured to: (i) receive a circuit of gates representing a quantum program for a variational algorithm in which computation is interleaved with compilation; (ii) identify a plurality of blocks, each block includes a subcircuit of gates, leaving one or more remainder subcircuits of the circuit of gates outside of the plurality of blocks; (iii) pre-compile each block of the plurality of blocks with a pulse generation program to generate a plurality of pre-compiled blocks including control pulses configured to perform the associated block on the quantum processor; and (iv) iteratively execute the quantum program using the pre-compiled blocks as static during runtime and recompiling the one or more remainder subcircuits on the classical processor at each iteration of execution.
    Type: Application
    Filed: September 9, 2020
    Publication date: November 24, 2022
    Inventors: Frederic T. CHONG, Pranav GOKHALE, Yongshan DING, Thomas PROPSON
  • Patent number: 11416228
    Abstract: A quantum computing system includes a quantum processor having a plurality of qubits, a classical memory, and a classical processor.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: August 16, 2022
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Frederic T. Chong, Yunong Shi, I, Nelson Leung, Pranav Gokhale, Henry Hoffmann, David Schuster
  • Publication number: 20210334081
    Abstract: A quantum computing system includes a quantum processor having a plurality of qubits, a classical memory, and a classical processor.
    Type: Application
    Filed: September 12, 2019
    Publication date: October 28, 2021
    Inventors: Frederic T. Chong, Yunong Shi, I, Nelson Leung, Pranav Gokhale, Henry Hoffmann, David Schuster
  • Patent number: 5519694
    Abstract: A switching network incorporates expander graphs such as multibutterflies but avoids the wiring complications resulting from the randomness of such graphs. The network includes metanodes, each having plural routers. Channels of multiple interconnections are connected between the metanodes according to an upper level expander graph. Interconnections within the channels are randomly connected. Interconnections on the channels may be time multiplexed and they may be dynamically assigned to routers within a metanode.
    Type: Grant
    Filed: February 4, 1994
    Date of Patent: May 21, 1996
    Assignee: Massachusetts Institute of Technology
    Inventors: Eric A. Brewer, Frederic T. Chong