Patents by Inventor Frederic T. Chong

Frederic T. Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11886379
    Abstract: A computing system includes a quantum processor with qubits, a classical memory including a quantum program defining a plurality of instructions in a source language, and a classical processor configured to: (i) receive a circuit of gates representing a quantum program for a variational algorithm in which computation is interleaved with compilation; (ii) identify a plurality of blocks, each block includes a subcircuit of gates, leaving one or more remainder subcircuits of the circuit of gates outside of the plurality of blocks; (iii) pre-compile each block of the plurality of blocks with a pulse generation program to generate a plurality of pre-compiled blocks including control pulses configured to perform the associated block on the quantum processor; and (iv) iteratively execute the quantum program using the pre-compiled blocks as static during runtime and recompiling the one or more remainder subcircuits on the classical processor at each iteration of execution.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 30, 2024
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Pranav Gokhale, Yongshan Ding, Thomas Propson, Frederic T. Chong
  • Publication number: 20220374390
    Abstract: A computing system includes a quantum processor with qubits, a classical memory including a quantum program defining a plurality of instructions in a source language, and a classical processor configured to: (i) receive a circuit of gates representing a quantum program for a variational algorithm in which computation is interleaved with compilation; (ii) identify a plurality of blocks, each block includes a subcircuit of gates, leaving one or more remainder subcircuits of the circuit of gates outside of the plurality of blocks; (iii) pre-compile each block of the plurality of blocks with a pulse generation program to generate a plurality of pre-compiled blocks including control pulses configured to perform the associated block on the quantum processor; and (iv) iteratively execute the quantum program using the pre-compiled blocks as static during runtime and recompiling the one or more remainder subcircuits on the classical processor at each iteration of execution.
    Type: Application
    Filed: September 9, 2020
    Publication date: November 24, 2022
    Inventors: Frederic T. CHONG, Pranav GOKHALE, Yongshan DING, Thomas PROPSON
  • Patent number: 11416228
    Abstract: A quantum computing system includes a quantum processor having a plurality of qubits, a classical memory, and a classical processor.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: August 16, 2022
    Assignee: THE UNIVERSITY OF CHICAGO
    Inventors: Frederic T. Chong, Yunong Shi, I, Nelson Leung, Pranav Gokhale, Henry Hoffmann, David Schuster
  • Publication number: 20210334081
    Abstract: A quantum computing system includes a quantum processor having a plurality of qubits, a classical memory, and a classical processor.
    Type: Application
    Filed: September 12, 2019
    Publication date: October 28, 2021
    Inventors: Frederic T. Chong, Yunong Shi, I, Nelson Leung, Pranav Gokhale, Henry Hoffmann, David Schuster
  • Patent number: 5519694
    Abstract: A switching network incorporates expander graphs such as multibutterflies but avoids the wiring complications resulting from the randomness of such graphs. The network includes metanodes, each having plural routers. Channels of multiple interconnections are connected between the metanodes according to an upper level expander graph. Interconnections within the channels are randomly connected. Interconnections on the channels may be time multiplexed and they may be dynamically assigned to routers within a metanode.
    Type: Grant
    Filed: February 4, 1994
    Date of Patent: May 21, 1996
    Assignee: Massachusetts Institute of Technology
    Inventors: Eric A. Brewer, Frederic T. Chong