Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

Abstract: A magnetic tunnel junction (MTJ) structure is of the type having a tunnel barrier positioned between a fixed ferromagnetic layer and a free ferromagnetic layer, the tunnel barrier includes a first barrier layer contacting either the fixed ferromagnetic layer or the free ferromagnetic layer. The first barrier layer transmits a high spin polarization and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides. The second barrier layer, which contacts the first barrier layer, has a low barrier height and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides.

Abstract: A magnetic tunnel junction (300) structure includes a layer (308) of iron having a thickness in the range of 1.0 to 5.0 ? disposed between a tunnel barrier (306) and a free magnetic element (310) resulting in high magnetoresistance (MR), low damping and an improved ratio Vc/Vbd of critical switching voltage to tunnel barrier breakdown voltage for improved spin torque yield and reliability while requiring only a low temperature anneal. This improved structure (300) also has a very low resistance-area product MgON diffusion barrier (312) between the free magnetic element (310) and an electrode (314) to prevent diffusion of the electrode into the free layer, which assists in keeping the damping, and therefore also the switching voltage, low. With the low annealing temperature, the breakdown voltage is high, resulting in a favorable ratio of Vc/Vbd and in a high proportion of devices switching before breakdown, therefore improving the yield and reliability of the devices.

Abstract: An oscillator includes at least one of: (i) a parallel array of resistors (420, 421, 422, 701, 801, 901, 902) or magnetoresistive contacts to a magnetoresistive film (120, 320); and (ii) a series array of resistors (620, 621, 702, 902) or magnetoresistive contacts to individualized areas of at least one magnetoresistive film.

Abstract: A spin-transfer MRAM bit includes a free magnet layer positioned between a pair of spin polarizers, wherein at least one of the spin polarizers comprises an unpinned synthetic antiferromagnet (SAF). The SAF may include two antiparallel fixed magnet layers separated by a coupling layer. To improve manufacturability, the layers of the SAF may be non-symmetrical (e.g., having different thicknesses or different inherent anisotropies) to assist in achieving proper alignment during anneal. The total magnetic moment of the SAF may be greater than that of the free magnet layer.

Abstract: A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

Abstract: A spin-transfer MRAM bit includes a free magnet layer positioned between a pair of spin polarizers, wherein at least one of the spin polarizers comprises an unpinned synthetic antiferromagnet (SAF). The SAF may include two antiparallel fixed magnet layers separated by a coupling layer. To improve manufacturability, the layers of the SAF may be non-symmetrical (e.g., having different thicknesses or different inherent anisotropies) to assist in achieving proper alignment during anneal. The total magnetic moment of the SAF may be greater than that of the free magnet layer.

Abstract: A magnetic tunnel junction (MTJ) structure is of the type having a tunnel barrier positioned between a fixed ferromagnetic layer and a free ferromagnetic layer, the tunnel barrier includes a first barrier layer contacting either the fixed ferromagnetic layer or the free ferromagnetic layer. The first barrier layer transmits a high spin polarization and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides. The second barrier layer, which contacts the first barrier layer, has a low barrier height and is selected from the group consisting of metal oxides, metal nitrides, and metal oxynitrides.

Abstract: A magnetic random access memory (“MRAM”) device can be selectively written using spin-transfer reflection mode techniques. Selectivity of a designated MRAM cell within an MRAM array is achieved by the dependence of the spin-transfer switching current on the relative angle between the magnetizations of the polarizer element and the free magnetic element in the MRAM cell. The polarizer element has a variable magnetization that can be altered in response to the application of a current, e.g., a digit line current. When the magnetization of the polarizer element is in the natural default orientation, the data in the MRAM cell is preserved. When the magnetization of the polarizer element is switched, the data in the MRAM cell can be written in response to the application of a relatively low write current.