Patents by Inventor Frederick Dahilig

Frederick Dahilig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR FLIP CHIP PACKAGE HAVING SUBSTANTIALLY NON-COLLAPSIBLE SPACER AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110108970
    Abstract: A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has a spacer to maintain a separation between the die and the die paddle. Also, methods for making the package are disclosed.
    Type: Application
    Filed: January 14, 2011
    Publication date: May 12, 2011
    Inventors: Jae Soo Lee, Geun Sik Kim, Sheila Marie L. Alvarez, Robinson Quiazon, Hin Hwa Goh, Frederick Dahilig
  • Semiconductor flip chip package having substantially non-collapsible spacer
    Patent number: 7880313
    Abstract: A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has a spacer to maintain a separation between the die and the die paddle. Also, methods for making the package are disclosed.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: February 1, 2011
    Assignee: Chippac, Inc.
    Inventors: Jae Soo Lee, Geun Sik Kim, Sheila Alvarez, Robinson Quiazon, Hin Hwa Goh, Frederick Dahilig
  • Semiconductor package flip chip interconnect having spacer
    Publication number: 20060192295
    Abstract: A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has a spacer to maintain a separation between the die and the die paddle. Also, methods for making the package are disclosed.
    Type: Application
    Filed: November 17, 2005
    Publication date: August 31, 2006
    Applicant: ChipPAC, Inc.
    Inventors: Jae Lee, Geun Kim, Sheila Alvarez, Robinson Quiazon, Hin Goh, Frederick Dahilig