Patents by Inventor Frederick J. Aichelman, Jr.

Frederick J. Aichelman, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory structure for nonsequential storage of block bytes in multi bit chips
    Patent number: 4992979
    Abstract: A memory system for the transfer of a block of data, wherein the transfer of data can begin at a starting address anywhere within the block. The block is stored on two memory chips, each having multiple parallel outputs. The two chips are addressed by a common high order address bus and different low order address bus. The low order addresses are generated such that an ordered sequence of bits, beginning at the starting address, is transferred in parallel to the register from both chips, regardless of the starting address.
    Type: Grant
    Filed: August 12, 1988
    Date of Patent: February 12, 1991
    Assignee: International Business Machines Corporation
    Inventors: Frederick J. Aichelman, Jr., Vincent F. Sollitto, Jr.