Patents by Inventor Frederick Joseph Jacobs
Frederick Joseph Jacobs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11960357Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: GrantFiled: April 24, 2023Date of Patent: April 16, 2024Assignee: VMware LLCInventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
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Publication number: 20240028336Abstract: In one set of embodiments, an operating system (OS) kernel of a computer system can receive an invocation of a system call by a user program running on the computer system. The OS kernel can further fetch a plurality of subsequent instructions that will be executed by the user program after the invocation of the system call and decode the plurality of subsequent instructions into a plurality of decoded instructions. The OS kernel can then analyze whether the plurality of decoded instructions include an additional system call invocation and whether other decoded instructions that appear between the invocation of the system call and the additional system call invocation are viable for emulation by the OS kernel.Type: ApplicationFiled: July 21, 2022Publication date: January 25, 2024Inventors: Frederick Joseph Jacobs, Sam Scalise, Martim Carbone
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Publication number: 20240028359Abstract: In one set of embodiments, new hardware-assisted virtualization features for a CPU are provided that include, among other things: (1) a new control structure that allows a kernel level hypervisor component to set, for each configurable property/setting maintained in an existing control structure, whether the property/setting is accessible from an unprivileged hypervisor mode of the CPU, (2) another new control structure that allows the kernel level hypervisor component to set, for each of a plurality of guest events or operations, whether the guest event or operation will cause a transition from a privileged or unprivileged guest mode of the CPU to the unprivileged hypervisor mode, and (3) the ability for the CPU to transition directly from the unprivileged hypervisor mode to the privileged or unprivileged guest mode.Type: ApplicationFiled: July 19, 2022Publication date: January 25, 2024Inventors: Sam Scalise, Frederick Joseph Jacobs, James Kenneth White
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Publication number: 20230259421Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: ApplicationFiled: April 24, 2023Publication date: August 17, 2023Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
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Publication number: 20230195533Abstract: A method of populating page tables of an executing workload during migration of the executing workload from a source host to a destination host includes the steps of: during transmission of memory pages of the executing workload from the source host to the destination host, populating the page tables of the workload at the destination host, wherein the populating comprises inserting mappings from virtual addresses of the workload to physical addresses of system memory of the destination host for all of the memory pages of the executing workload; and upon completion of transmission of all of the memory pages of the workload, resuming the workload at the destination host.Type: ApplicationFiled: December 22, 2021Publication date: June 22, 2023Inventors: Yury BASKAKOV, Ying YU, Anurekh SAXENA, Arunachalam RAMANATHAN, Frederick Joseph JACOBS, Giritharan RASHIYAMANY
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Patent number: 11669388Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: GrantFiled: October 5, 2021Date of Patent: June 6, 2023Assignee: VMware, Inc.Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P Mann, Frederick Joseph Jacobs
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Patent number: 11586371Abstract: A method of populating page tables of an executing workload during migration of the executing workload from a source host to a destination host includes the steps of: before resuming the workload at the destination host, populating the page tables of the workload at the destination host, wherein the populating comprises inserting mappings from virtual addresses of the workload to physical addresses of system memory of the destination host; and upon completion of populating the page tables, resuming the workload at the destination host.Type: GrantFiled: July 23, 2021Date of Patent: February 21, 2023Assignee: VMware, Inc.Inventors: Yury Baskakov, Ying Yu, Anurekh Saxena, Arunachalam Ramanathan, Frederick Joseph Jacobs, Giritharan Rashiyamany
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Publication number: 20230023452Abstract: A method of populating page tables of an executing workload during migration of the executing workload from a source host to a destination host includes the steps of: before resuming the workload at the destination host, populating the page tables of the workload at the destination host, wherein the populating comprises inserting mappings from virtual addresses of the workload to physical addresses of system memory of the destination host; and upon completion of populating the page tables, resuming the workload at the destination host.Type: ApplicationFiled: July 23, 2021Publication date: January 26, 2023Inventors: Yury BASKAKOV, Ying YU, Anurekh SAXENA, Arunachalam RAMANATHAN, Frederick Joseph JACOBS, Giritharan RASHIYAMANY
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Publication number: 20220027231Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: ApplicationFiled: October 5, 2021Publication date: January 27, 2022Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P Mann, Frederick Joseph Jacobs
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Patent number: 11169870Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: GrantFiled: January 15, 2020Date of Patent: November 9, 2021Assignee: VMware, Inc.Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
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Publication number: 20210216394Abstract: Techniques for migrating virtual machines (VMs) in the presence of uncorrectable memory errors are provided. According to one set of embodiments, a source host hypervisor of a source host system can determine, for each guest memory page of a VM to be migrated from the source host system to a destination host system, whether the guest memory page is impacted by an uncorrectable memory error in a byte-addressable memory of the source host system. If the source host hypervisor determines that the guest memory page is impacted, the source host hypervisor can transmit a data packet to a destination host hypervisor of the destination host system that includes error metadata identifying the guest memory page as being corrupted. Alternatively, if the source host hypervisor determines that the guest memory page is not impacted, the source host hypervisor can attempt to read the guest memory page from the byte-addressable memory in a memory exception-safe manner.Type: ApplicationFiled: January 15, 2020Publication date: July 15, 2021Inventors: Sowgandh Sunil Gadi, Rajesh Venkatasubramanian, Venkata Subhash Reddy Peddamallu, Arunachalam Ramanathan, Timothy P. Mann, Frederick Joseph Jacobs
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Patent number: 11016767Abstract: A method for redirecting indirect calls to direct calls on a per-process basis includes accessing a memory code region of an operating system kernel that has a different mapping for each of one or more user processes running on the operating system kernel. The memory code region stores a first trampoline that refers directly to a second trampoline, which is an inline or outline trampoline that is correlated with a particular user process. Executing the first trampoline invokes the second trampoline, as a result of which the indirect calls are redirected to direct calls.Type: GrantFiled: July 24, 2019Date of Patent: May 25, 2021Assignee: VMWARE, INC.Inventors: Nadav Amit, Frederick Joseph Jacobs, Michael Wei
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Patent number: 10908912Abstract: A method for redirecting an indirect call in an operating system kernel to a direct call is disclosed. The direct calls are contained in trampoline code called an inline jump switch (IJS) or an outline jump switch (OJS). The IJS and OJS can operate in either a use mode, redirecting an indirect call to a direct call, a learning and update mode or fallback mode. In the learning and update mode, target addresses in a trampoline code template are learned and updated by a jump switch worker thread that periodically runs as a kernel process. When building the kernel binary, a plug-in is integrated into the kernel. The plug-in replaces call sites with a trampoline code template containing a direct call so that the template can be later updated by the jump switch worker thread.Type: GrantFiled: July 24, 2019Date of Patent: February 2, 2021Assignee: VMWARE, INC.Inventors: Nadav Amit, Frederick Joseph Jacobs, Michael Wei
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Publication number: 20210011728Abstract: A method for redirecting an indirect call in an operating system kernel to a direct call is disclosed. The direct calls are contained in trampoline code called an inline jump switch (IJS) or an outline jump switch (OJS). The IJS and OJS can operate in either a use mode, redirecting an indirect call to a direct call, a learning and update mode or fallback mode. In the learning and update mode, target addresses in a trampoline code template are learned and updated by a jump switch worker thread that periodically runs as a kernel process. When building the kernel binary, a plug-in is integrated into the kernel. The plug-in replaces call sites with a trampoline code template containing a direct call so that the template can be later updated by the jump switch worker thread.Type: ApplicationFiled: July 24, 2019Publication date: January 14, 2021Inventors: Nadav AMIT, Frederick Joseph JACOBS, Michael WEI
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Publication number: 20210011722Abstract: A method for redirecting indirect calls to direct calls on a per-process basis includes accessing a memory code region of an operating system kernel that has a different mapping for each of one or more user processes running on the operating system kernel. The memory code region stores a first trampoline that refers directly to a second trampoline, which is an inline or outline trampoline that is correlated with a particular user process. Executing the first trampoline invokes the second trampoline, as a result of which the indirect calls are redirected to direct calls.Type: ApplicationFiled: July 24, 2019Publication date: January 14, 2021Inventors: Nadav AMIT, Frederick Joseph JACOBS, Michael WEI
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Publication number: 20210011738Abstract: A method of redirecting an indirect call in a callback list associated with a list of functions that are registered, includes the steps of: upon registering the list of functions, determining a list of function pointers, each of which corresponds to an address in an associated callback; for each function pointer in the list of function pointers, adding a direct call instruction to the registration trampoline corresponding to the associated callback of the function pointer; and upon invoking the associated callback of one of the function pointers in the list of function pointers, invoking the corresponding direct call instruction in the registration trampoline.Type: ApplicationFiled: January 17, 2020Publication date: January 14, 2021Inventors: Nadav AMIT, Frederick Joseph JACOBS, Michael WEI
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Patent number: 10871974Abstract: A method of redirecting an indirect call in a callback list associated with a list of functions that are registered, includes the steps of: upon registering the list of functions, determining a list of function pointers, each of which corresponds to an address in an associated callback; for each function pointer in the list of function pointers, adding a direct call instruction to the registration trampoline corresponding to the associated callback of the function pointer; and upon invoking the associated callback of one of the function pointers in the list of function pointers, invoking the corresponding direct call instruction in the registration trampoline.Type: GrantFiled: January 17, 2020Date of Patent: December 22, 2020Assignee: VMware, Inc.Inventors: Nadav Amit, Frederick Joseph Jacobs, Michael Wei
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Patent number: 10834255Abstract: A method redirecting an indirect call in a call table to direct call includes the steps of: recording frequencies of calls in a frequency table; updating a search trampoline to cache, as direct calls, calls of the call table that are most frequently made according to the recorded calls in the frequency table; receiving a request to perform one of the calls in the call table; performing a search of the search trampoline to determine whether or not the requested call is cached in the search trampoline; if the requested call is cached in the search trampoline, performing the requested call that is cached in the search trampoline; and if the requested call is not cached in the search trampoline, performing the requested call by accessing the call via the call table.Type: GrantFiled: January 21, 2020Date of Patent: November 10, 2020Assignee: VMware, Inc.Inventors: Nadav Amit, Frederick Joseph Jacobs, Michael Wei
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Patent number: 10678909Abstract: Techniques for securely supporting a global view of system memory in a physical/virtual computer system comprising a plurality of physical/virtual CPUs are provided. In one set of embodiments, the physical/virtual computer system can receive an interrupt indicating that a first physical/virtual CPU should enter a privileged CPU operating mode. The physical/virtual computer system can further determine that none of the plurality of physical/virtual CPUs are currently in the privileged CPU operating mode. In response to this determination, the physical/virtual computer system can modify the global view of system memory to include a special memory region comprising program code to be executed while in the privileged CPU operating mode; communicate, to the other physical/virtual CPUs, a signal to enter a stop state in which execution is halted but interrupts are accepted for entering the privileged CPU operating mode; and cause the first physical/virtual CPU to enter the privileged CPU operating mode.Type: GrantFiled: November 21, 2017Date of Patent: June 9, 2020Assignee: VMWARE, INC.Inventors: Alok Nemchand Kataria, Doug Covelli, Jeffrey W. Sheldon, Frederick Joseph Jacobs, David Dunn
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Publication number: 20180307829Abstract: Techniques for securely supporting a global view of system memory in a physical/virtual computer system comprising a plurality of physical/virtual CPUs are provided. In one set of embodiments, the physical/virtual computer system can receive an interrupt indicating that a first physical/virtual CPU should enter a privileged CPU operating mode. The physical/virtual computer system can further determine that none of the plurality of physical/virtual CPUs are currently in the privileged CPU operating mode. In response to this determination, the physical/virtual computer system can modify the global view of system memory to include a special memory region comprising program code to be executed while in the privileged CPU operating mode; communicate, to the other physical/virtual CPUs, a signal to enter a stop state in which execution is halted but interrupts are accepted for entering the privileged CPU operating mode; and cause the first physical/virtual CPU to enter the privileged CPU operating mode.Type: ApplicationFiled: November 21, 2017Publication date: October 25, 2018Inventors: ALOK NEMCHAND KATARIA, DOUG COVELLI, JEFFREY W. SHELDON, FREDERICK JOSEPH JACOBS, DAVID DUNN