Abstract: Methods and apparatus for identifying disease status according to various aspects of the present invention include delivering one or more imaging agents to all or parts of the body for disease observation, screening and/or detection. The methods and apparatus may deliver imaging agents that include any suitable disease-associated compositions, such as riboflavin carrier protein (RCP) and/or RCP modifications and antibodies thereof, labeled with an imaging label. In one embodiment, the imaging agents may be delivered to a selected site or sites in the body and subsequently observed using an imaging method. In another embodiment, the imaging agents may be delivered throughout the body for screening applications. In yet another embodiment, the imaging agents may be delivered throughout the body to detect a reduction and/or increase in cellular metabolism.

Abstract: Embodiments of the present invention generally relate to a novel bacterial antigen extraction and methods for its use. Further embodiments of the present invention use the novel bacterial antigens in diagnostic kits for the detection of Bartonella antibodies in serum.

Abstract: A system includes cascaded content addressable memory (CAM) chips connected to a common bus. Each CAM chip includes a CAM array, a self-timed signal generator and hit propagation and match address transfer circuits. Each CAM array including an array of core cells provides, through its encoder, hit and match address signals resulting from a search operation in response to a clock signal. Each match address transfer circuit transfers the match address signal to the common bus, in response to a self-timed signal, the hit signal and a propagation-in hit signal provided from an upstream CAM chip, so that more than one CAM chip is prevented from providing the match address signal to the common bus simultaneously. Each hit propagation circuit provides a propagation-out hit signal to a downstream CAM chip, in response to the self-timed signal, the hit signal and the propagation-in hit signal from the upstream CAM chip, so that a hit signal is propagated from an upstream CAM chip to a downstream CAM chip.

Abstract: Disclosed is an architecture of a RAM (random access memory) with BIST (built-in self test) or functional test function. The RAM has a memory cell for storing differential or single-ended binary data and bit line signals are fully differential or single-ended. Shadow write is applied to read only and read-write bit lines. With the test function, port-to-port bit line shorts and port-to-port word line shorts are sensitized.

Abstract: A system includes a plurality of content addressable memory (CAM) chips which are cascaded and connected to a common bus. Each of the CAM chips provides search results (hit, match address and multiple match). A hit signal and a multiple match signal are propagated from chip to chip. A system hit result is given from the furthest down stream CAM chip. The match address result of the system is given from the common bus, where on-chip self-timed signals guarantee that there is no driving contention on the bus. An example of the CAM chip includes an extra row including a model match line and modified core cells to provide a model miss signal. The self-timed signal is provided in response to the model match line. In another example of the CAM chip, each word is divided into two halves. The match lines of the two halves of the word are coupled by a NAND circuit, the output of which is coupled to an encoder of the chip. The CAM chip includes an extra row including a chain of model match lines.

Abstract: A large-capacity CAM (content addressable memory) is disclosed. RAM core cells are used to store the CAM data. The comparison function is not performed in the core cells, but rather in comparators which are placed adjacent to a plurality of core cells, in such a way that the plurality of core cells shares access to a single comparator. Access to the comparator is shared by a time-division multiplexed means, requiring a plurality of serialized operations. These operations are self-timed and transparent to the user, because they occur in a single cycle of the externally-supplied clock.

Abstract: A large-capacity CAM (content addressable memory) is disclosed. RAM core cells are used to store the CAM data. The comparison function is not performed in the core cells, but rather in comparators which are placed adjacent to a plurality of core cells, in such a way that the plurality of core cells shares access to a single comparator. Access to the comparator is shared by a time-division multiplexed means, requiring a plurality of serialized operations. These operations are self-timed and transparent to the user, because they occur in a single cycle of the externally-supplied clock.

Abstract: A content addressable memory employs a word-sliced architecture, in order to localize word match logic, and a global data bus, to convey data between the memory input/output circuitry and the plurality of word slices. Timing information is embedded in the global data bus in the form of a model global data signal. This signal interacts with two major control signals to self-time the memory. The number of major control signals is such that all possible memory states are uniquely represented, but the memory cannot power-up in an invalid or unrecoverable state. Three model timing paths are used to match the delay of the self-timing loop with that of the actual operation: one each for READ, WRITE and SEARCH.

Abstract: A multi-port RAM (random access memory) includes RAM cells which are coupled to respective row and column lines of each port. RAM cells selected by signals on the row and column lines of a port store binary data. A ground level voltage is applied onto selected column lines in a shadow write mode. Any short between the active column lines and the column lines in shadow write will result in a significant error voltage being applied to the active column line and invalid read will result. Shorts between column lines from different ports are sensitized.

Abstract: Disclosed is an architecture of a RAM (random access memory) with BIST (built-in self test) or functional test function. The RAM has a memory cell for storing differential or single-ended binary data and bit line signals are fully differential or single-ended. Shadow write is applied to read only and read-write bit lines. With the test function, port-to-port bit line shorts and port-to-port word line shorts are sensitized.

Abstract: The implementation of two-dimensional decoding, necessary to achieve a reasonable array aspect ratio for a large content addressable memory, is achieved by having multiple match lines per physical row, these match lines being physically routed on top of the array core cell in an upper metal layer. To limit power dissipation in the resulting large-capacity content addressable memory, the match function is implemented by two or more NAND chains per word. Means for achieving the precharging and evaluation of these chains, and for implementing dummy chains for the provision of timing information, are also disclosed.

Abstract: A large-capacity CAM (content addressable memory) is disclosed. RAM core cells are used to store the CAM data. The comparison function is not performed in the core cells, but rather in comparators which are placed adjacent to a plurality of core cells, in such a way that the plurality of core cells shares access to a single comparator. Access to the comparator is shared by a time-division multiplexed means, requiring a plurality of serialized operations. These operations are self-timed and transparent to the user, because they occur in a single cycle of the externally-supplied clock.

Abstract: A fuzzy logic based control method adjusts the pump speed of a cleaning apparatus in which tubes or other article are located in a tank of cleaning solution. The tank has a circulation system with a discharge header for directing the cleaning solution at the tubes and a suction header for pulling fluid from the tank. The circulation system has a variable speed pump for circulating the fluid. A funnel directs the flow from the tubes towards the suction header. A fuzzy logic controller is used to determine when the pump speed may be stablized at a cleaning speed creating the proper flow of a cleaning solution through the tubes. The fuzzy logic controller utilizes a novel algorithm to determine the proper pump speed which uses fuzzy input variables for the input flow, the output flow, and the amplitude of the difference.

Abstract: Disclosed is an architecture of a RAM (random access memory) with BIST (built-in self test) or functional test function. The RAM has a memory cell for storing differential or single-ended binary data and bit line signals are fully differential or single-ended. Shadow write is applied to read only and read-write bit lines. With the test function, port-to-port bit line shorts and port-to-port word line shorts are sensitized.

Abstract: Disclosed is an architecture of a RAM (random access memory) with BIST (built-in self test) or functional test function. The RAM has a memory cell for storing differential or single-ended binary data and bit line signals are fully differential or single-ended. Shadow write is applied to read only and read-write bit lines. With the test function, port-to-port bit line shorts and port-to-port word line shorts are sensitized.

Abstract: An automated assembly that can be retroactively added to a bank of machines in order to advance an object across the bank of machines in an automated fashion. The automation assembly includes a plurality of elongated elements that can be rotated from a first orientation, capable of engaging an object to be moved across the bank of machines, to a second orientation that is clear of the object to be moved. Each of the elongated elements are equidistantly spaced on a common support along a line matching the linear path along which the object on the bank of machines will be moved.A reciprocating device joins the common support of the elongated elements to a stationary point. As a result, the reciprocating device causes the common support and the various elongated elements to reciprocate back and forth between a first position and a second position.

Abstract: A fluid actuated cylinder in combination with a container, the cylinder operating to lower an object into the container and to raise the object out of the container. The cylinder and container comprise a cylinder, a mounting assembly attached to the wall of the container for mounting the cylinder to the wall of the container. A cylinder a pivot bearing arrangement associated with the cylinder and the cylinder mounting assembly is provided for allowing the cylinder to move laterally in an orbital motion with respect to the cylinder mounting assembly when the cylinder is subjected to bending torques resulting from the lowering and raising of the object.

Abstract: The present invention is an apparatus and method for immersing at least one contaminated part in a fluid, wherein the contaminated parts are moved through the fluid with both a rotational and reciprocal movement. The compound movement of the contaminated parts cause the parts to be repeatedly lifted from, and immersed within, the fluid, thereby improving the interaction of the fluid on all surfaces of the contaminated parts regardless to the shape or orientation of the contaminated parts.