Abstract: An uninterruptible power supply (UPS) system includes at least three UPSs configured to be connected in parallel to a common load. The system further includes control circuitry configured to support at least two redundant groups among the UPSs and to support at least two redundant subgroups among at least one of the redundant groups of UPSs. In this manner, a nested redundancy may be provided.

Abstract: A UPS is operated by deasserting a static switch drive signal, e.g., a gate signal to a thyristor, and then delaying provision of power from a converter circuit of the UPS, e.g., an inverter or other source of AC power, until after the switch has current commutated to an off state. For example, expiration of a predetermined time interval following deassertion of the switch drive signal may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected expiration of the predetermined time interval. Alternatively, a current in the static switch may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected current. The invention may be embodied as methods and apparatus.

Abstract: A UPS is operated by deasserting a static switch drive signal, e.g., a gate signal to a thyristor, and then delaying provision of power from a converter circuit of the UPS, e.g., an inverter or other source of AC power, until after the switch has current commutated to an off state. For example, expiration of a predetermined time interval following deassertion of the switch drive signal may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected expiration of the predetermined time interval. Alternatively, a current in the static switch may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected current. The invention may be embodied as methods and apparatus.

Abstract: A power supply apparatus includes first and second parallel-connected uninterruptible power supplies (UPSs), each including an AC/DC converter circuit and a DC/AC converter circuit having an input coupled to an output of the AC/DC converter circuit by a DC link, inputs of the AC/DC converter circuits of the first and second UPSs connected in common to an AC source and outputs of the DC/AC converter circuits of the first and second UPSs connected in common to a load. The first and second UPSs are configured to support a test mode wherein the first UPS is test loaded by transferring power from the output of the DC/AC converter circuit of the first UPS to the output of the DC/AC converter circuit of the second UPS. The first UPS may be configured to provide power to the load concurrent with test loading by the second UPS.

Abstract: An uninterruptible power supply (UPS) system includes at least three UPSs configured to be connected in parallel to a common load. The system further includes control circuitry configured to support at least two redundant groups among the UPSs and to support at least two redundant subgroups among at least one of the redundant groups of UPSs. In this manner, a nested redundancy may be provided.

Abstract: An uninterruptible power supply (UPS) system includes at least three UPSs configured to be connected in parallel to a common load. The system further includes control circuitry configured to support at least two redundant groups among the UPSs and to support at least two redundant subgroups among at least one of the redundant groups of UPSs. In this manner, a nested redundancy may be provided.

Abstract: Provided are methods and apparatus for characterizing a power waveform. Some such methods include sampling the power waveform to generate a plurality of samples and, for each of the samples, recursively processing the sample to generate an aggregate signal energy value, processing the sample to generate a harmonic component signal energy value associated with at least one target harmonic frequency, and accumulating the aggregate signal energy value and the component signal energy value with previously generated aggregate signal energy values and component signal energy values to generate an accumulated aggregate signal energy value and an accumulated harmonic component signal energy value. Methods also include characterizing the power waveform responsive to the accumulated aggregate signal energy value and the accumulated harmonic component signal energy value.

Abstract: A power supply apparatus includes first and second parallel-connected uninterruptible power supplies (UPSs), each including an AC/DC converter circuit and a DC/AC converter circuit having an input coupled to an output of the AC/DC converter circuit by a DC link, inputs of the AC/DC converter circuits of the first and second UPSs connected in common to an AC source and outputs of the DC/AC converter circuits of the first and second UPSs connected in common to a load. The first and second UPSs are configured to support a test mode wherein the first UPS is test loaded by transferring power from the output of the DC/AC converter circuit of the first UPS to the output of the DC/AC converter circuit of the second UPS. The first UPS may be configured to provide power to the load concurrent with test loading by the second UPS.

Abstract: Provided are methods and apparatus for characterizing a power waveform. Some such methods include sampling the power waveform to generate a plurality of samples and, for each of the samples, recursively processing the sample to generate an aggregate signal energy value, processing the sample to generate a harmonic component signal energy value associated with at least one target harmonic frequency, and accumulating the aggregate signal energy value and the component signal energy value with previously generated aggregate signal energy values and component signal energy values to generate an accumulated aggregate signal energy value and an accumulated harmonic component signal energy value. Methods also include characterizing the power waveform responsive to the accumulated aggregate signal energy value and the accumulated harmonic component signal energy value.

Abstract: Paralleled uninterruptible power supplies (UPSs) including respective pulse-width modulation (PWM) power converter circuits coupled in common to an AC load bus have PWM cycles that are synchronized. In particular, sampling of control inputs of the PWM power converter circuits may be synchronized, such that, for example, sampling of control inputs to the PWM power converter circuits occurs at substantially the same time for each of the PWM power converter circuits. A common phase reference corresponding to an AC voltage phase for the AC load bus may be provided, and the PWM cycles of each of the power converter circuits may synchronized, e.g., phase locked, to the common phase reference. More particularly, the respective PWM cycles of the UPSs may be phase locked to phase locked sinusoidal reference signals generated at each of the UPSs. Sampling for other control functions may also be synchronized to the PWM cycles.

Abstract: Status of a bypass source of parallel-connected UPSs is determined from a load share when a loading of the parallel-connected UPSs meets a predetermined criterion. Status of a bypass source of the parallel-connected UPSs is determined from a bypass source voltage when the loading of the parallel-connected UPSs fails to meet the predetermined criterion. The loading may include an aggregate loading, and failure of a bypass source of a UPS may be identified responsive to detecting that a load share of the UPS is less than a predetermined proportion of the aggregate loading. Alternatively, failure of the bypass source may be identified by detecting that a bypass voltage fails to meet a predetermined criterion. Bypass circuits of the UPSs may be controlled responsive to a load share and/or a bypass source voltage.

Abstract: An uninterruptible power supply (UPS) system includes at least three UPSs configured to be connected in parallel to a common load. The system further includes control circuitry configured to support at least two redundant groups among the UPSs and to support at least two redundant subgroups among at least one of the redundant groups of UPSs. In this manner, a nested redundancy may be provided.

Abstract: A closed loop power converter circuit of a UPS or other power supply includes a pulse width modulator circuit in a forward path of the closed loop power circuit. A compensation circuit provides pulse width commands to the pulse width modulator at a first rate. A feedback circuit digitally filters samples of an output of the closed loop power converter at a second rate greater the first rate and that provides the filtered samples to the compensation circuit. In some embodiments, the compensation circuit may be operative to compensate for the phase lag associated with a low pass output filter.

Abstract: Paralleled uninterruptible power supplies (UPSs) including respective pulse-width modulation (PWM) power converter circuits coupled in common to an AC load bus have PWM cycles that are synchronized. In particular, sampling of control inputs of the PWM power converter circuits may be synchronized, such that, for example, sampling of control inputs to the PWM power converter circuits occurs at substantially the same time for each of the PWM power converter circuits. A common phase reference corresponding to an AC voltage phase for the AC load bus may be provided, and the PWM cycles of each of the power converter circuits may synchronized, e.g., phase locked, to the common phase reference. More particularly, the respective PWM cycles of the UPSs may be phase locked to phase locked sinusoidal reference signals generated at each of the UPSs. Sampling for other control functions may also be synchronized to the PWM cycles.

Abstract: Status of a bypass source of parallel-connected UPSs is determined from a load share when a loading of the parallel-connected UPSs meets a predetermined criterion. Status of a bypass source of the parallel-connected UPSs is determined from a bypass source voltage when the loading of the parallel-connected UPSs fails to meet the predetermined criterion. The loading may include an aggregate loading, and failure of a bypass source of a UPS may be identified responsive to detecting that a load share of the UPS is less than a predetermined proportion of the aggregate loading. Alternatively, failure of the bypass source may be identified by detecting that a bypass voltage fails to meet a predetermined criterion. Bypass circuits of the UPSs may be controlled responsive to a load share and/or a bypass source voltage.

Abstract: A power supply apparatus, such as an on-line UPS, includes an AC/DC converter circuit having an input configured to be coupled to an AC source, a DC/AC converter circuit having an input coupled to an output of the AC/DC converter circuit by a DC link, and a bypass circuit operative to couple and decouple the output of the DC/AC converter circuit to and from the input of the AC/DC converter circuit. Power is transferred from the output of DC/AC converter circuit via the bypass circuit to conduct a test of the apparatus, such as a factory or field load test. For example, power may be circulated around a loop including the AC/DC converter circuit, the DC/AC converter circuit and the bypass circuit to conduct the test in order to test these components under load. A status of such components may be determined responsive to the test. In further embodiments, such components may be calibrated responsive to the test.

Abstract: A UPS is operated by deasserting a static switch drive signal, e.g., a gate signal to a thyristor, and then delaying provision of power from a converter circuit of the UPS, e.g., an inverter or other source of AC power, until after the switch has current commutated to an off state. For example, expiration of a predetermined time interval following deassertion of the switch drive signal may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected expiration of the predetermined time interval. Alternatively, a current in the static switch may be detected, and the converter circuit may be enabled to drive the output of the UPS responsive to the detected current. The invention may be embodied as methods and apparatus.

Abstract: A closed loop power converter circuit of a UPS or other power supply includes a pulse width modulator circuit in a forward path of the closed loop power circuit. A compensation circuit provides pulse width commands to the pulse width modulator at a first rate. A feedback circuit digitally filters samples of an output of the closed loop power converter at a second rate greater the first rate and that provides the filtered samples to the compensation circuit. In some embodiments, the compensation circuit may be operative to compensate for the phase lag associated with a low pass output filter. For example, the compensation circuit may include a high pass IIR filter, operating at the first rate, that compensates for a pole associated with the low pass output filter, while the feedback circuit includes a low pass filter, operating at the second rate, that compensates for a frequency response peak associated with the high pass filter.

Abstract: An AC power supply, e.g., an uninterruptible power supply (UPS), includes an output, a reference signal generator circuit operative to generate a reference signal representative of a desired voltage waveform at a node connected to the output, a power determiner circuit operative to generate an estimate of instantaneous reactive power transferred between the output and the node, and a reference signal compensator circuit responsive to the reference signal generator circuit and to the power determiner circuit and operative to generated a compensated reference signal from the reference signal responsive to the estimate of instantaneous reactive power. An AC voltage generator circuit is responsive to the reference signal compensator and operative to transfer current between the output and the node responsive to the compensated reference signal.

Abstract: An AC power supply, e.g., an uninterruptible power supply (UPS), includes an output, a reference signal generator circuit operative to generate a reference signal representative of a desired voltage waveform at a node connected to the output, a power determiner circuit operative to generate an estimate of instantaneous reactive power transferred between the output and the node, and a reference signal compensator circuit responsive to the reference signal generator circuit and to the power determiner circuit and operative to generated a compensated reference signal from the reference signal responsive to the estimate of instantaneous reactive power. An AC voltage generator circuit is responsive to the reference signal compensator and operative to transfer current between the output and the node responsive to the compensated reference signal.