Patents by Inventor Frederick Underwood

Frederick Underwood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060120909
    Abstract: A pump comprises at least one rotor (1), a stator (5) and a housing (5), the rotor (1) being enclosed by the housing (5). The housing (5) comprises at least one port (2) extending through the housing (5) to enable delivery of a fluid directly onto a surface of the at least one rotor (1).
    Type: Application
    Filed: October 6, 2003
    Publication date: June 8, 2006
    Inventors: Mark Hope, Clive Marcus Tunna, Frederick Underwood
  • Publication number: 20050123414
    Abstract: A conduit supplies a flow of gas to a sealed chamber surrounding the swept volume of a pump. The conduit comprises a flow impedance for limiting the rate of flow of the gas to the sealed chamber. Signals output from pressure transducers provided on either side of the flow impedance are used to detect leakage of gas from the sealed chamber into the pump swept volume, thus indicating the state of the seal surrounding the swept volume.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 9, 2005
    Inventors: Matthew Key, Nicholas Hutton, Frederick Underwood, Phillip North
  • Patent number: 5928357
    Abstract: The pipeline architecture minimizes delays incurred during execution of branch instructions. While a first instruction is executing, a second instruction is fetched and is ready for execution at the beginning of the next clock cycle. Control logic examines the fetched instruction during the first clock cycle to determine whether the instruction is a branch instruction which may indicate that the address of the next instruction is not the next sequential address. Flags which indicate the state of the system are examined to determine if the address of the instruction is the next sequential address or the address indicated in the branch instruction. As this is performed during the fetch clock cycle of the branch instruction, during execution of the branch instruction, the instruction at the address selected is fetched and is ready for execution without delay.
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: July 27, 1999
    Assignee: Intel Corporation
    Inventors: Keith Frederick Underwood, Richard Joseph Durante