Abstract: Variable capacitance bucket brigade memory in which variable capacitances are used instead of fixed capacitances in order to reduce the Signal-Step-Response-Error.

Abstract: A semiconductor pick-up arrangement in which the picked up information is transported through a series of shift elements to an output. Since each information passes another number of shift elements in which the passage of a signal per switching operation is non-ideal, there is a place or time-dependent signal degradation. To obtain a uniform signal degradation the information is applied to an analog shift register of a forward and backward shifting type in which the signal degradation per switching operation at the shift register has been reduced by approximately 50% of that at the series.