Abstract: A method and apparatus allowing two independent arbiters which do not directly talk to one another to function on a common system bus, allowing efficient operation of a master controller, and virtually endless capability to add peripherals to the common system bus without problems or major modifications commonly associated with additional arbitration overhead. A master controller sets time slot parameters for an external, subordinate arbiter as often as desired. Based on the time slot parameter information, the subordinate arbiter functions on an electrically separated portion of the common system bus during all times but for a time slot associated with communication of the super arbiter over the entire common system bus. During this time, a tri-state buffer element allows communication between portions of the common system bus.