Patents by Inventor Freek Egbert Van Straten
Freek Egbert Van Straten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11929310Abstract: Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.Type: GrantFiled: December 9, 2021Date of Patent: March 12, 2024Assignee: NXP USA, Inc.Inventors: Lu Li, Lakshminarayan Viswanathan, Freek Egbert van Straten
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Patent number: 11842957Abstract: An amplifier module includes a module substrate with a mounting surface, a signal conducting layer, a ground layer, and a ground terminal pad at the mounting surface. A thermal dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the ground terminal pad, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the ground terminal pad, the ground layer of the module substrate, and the thermal dissipation structure.Type: GrantFiled: December 29, 2020Date of Patent: December 12, 2023Assignee: NXP USA, Inc.Inventors: Jeffrey Kevin Jones, Kevin Kim, Freek Egbert van Straten, Ibrahim Khalil
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Publication number: 20230230924Abstract: A substrate is described with a thermal dissipation structure sintered to thermal vias. In one example, a microelectronic module includes a recess between first and second substrate surfaces. One or more thermal vias extend between the first substrate surface and the interior recess surface, wherein each of the thermal vias has an interior end exposed at the interior recess surface. A sintered metal layer is in the recess and in physical contact with the interior end of the thermal vias and a thermal dissipation structure is in the recess over the sintered metal layer. The thermal dissipation structure is attached to the substrate within the recess by the sintered metal layer, and the thermal dissipation structure is thermally coupled to the thermal vias through the sintered metal layer.Type: ApplicationFiled: February 28, 2023Publication date: July 20, 2023Inventors: Lu Li, Lakshminarayan Viswanathan, Freek Egbert van Straten
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Publication number: 20230187325Abstract: Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.Type: ApplicationFiled: December 9, 2021Publication date: June 15, 2023Inventors: Lu Li, Lakshminarayan Viswanathan, Freek Egbert van Straten
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Patent number: 11621228Abstract: A substrate is described with a thermal dissipation structure sintered to thermal vias. In one example, a microelectronic module includes a recess between first and second substrate surfaces. One or more thermal vias extend between the first substrate surface and the interior recess surface, wherein each of the thermal vias has an interior end exposed at the interior recess surface. A sintered metal layer is in the recess and in physical contact with the interior end of the thermal vias and a thermal dissipation structure is in the recess over the sintered metal layer. The thermal dissipation structure is attached to the substrate within the recess by the sintered metal layer, and the thermal dissipation structure is thermally coupled to the thermal vias through the sintered metal layer.Type: GrantFiled: August 31, 2020Date of Patent: April 4, 2023Assignee: NXP USA, Inc.Inventors: Lu Li, Lakshminarayan Viswanathan, Freek Egbert van Straten
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Publication number: 20220384307Abstract: A thermal interface structure for transferring heat from an electronic component to a system heat sink includes a stack of one or more layers of a stiff thermal interface material and one or more layers of a compliant thermal interface material stacked on and connected to the one or more layers of the compliant thermal interface material. In some embodiments, the thermal interface structure also may include one or more layers of a shape memory alloy and/or a collapsible encasement.Type: ApplicationFiled: June 1, 2021Publication date: December 1, 2022Inventors: Lu Li, Sharan Kishore, Freek Egbert van Straten, Lakshminarayan Viswanathan
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Publication number: 20220208670Abstract: An amplifier module includes a module substrate with a mounting surface, a signal conducting layer, a ground layer, and a ground terminal pad at the mounting surface. A thermal dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the ground terminal pad, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the ground terminal pad, the ground layer of the module substrate, and the thermal dissipation structure.Type: ApplicationFiled: December 29, 2020Publication date: June 30, 2022Inventors: Jeffrey Kevin Jones, Kevin Kim, Freek Egbert van Straten, Ibrahim Khalil
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Publication number: 20220068817Abstract: A substrate is described with a thermal dissipation structure sintered to thermal vias. In one example, a microelectronic module includes a recess between first and second substrate surfaces. One or more thermal vias extend between the first substrate surface and the interior recess surface, wherein each of the thermal vias has an interior end exposed at the interior recess surface. A sintered metal layer is in the recess and in physical contact with the interior end of the thermal vias and a thermal dissipation structure is in the recess over the sintered metal layer. The thermal dissipation structure is attached to the substrate within the recess by the sintered metal layer, and the thermal dissipation structure is thermally coupled to the thermal vias through the sintered metal layer.Type: ApplicationFiled: August 31, 2020Publication date: March 3, 2022Inventors: Lu LI, Lakshminarayan VISWANATHAN, Freek Egbert van Straten
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Patent number: 9911628Abstract: For so called film assisted molding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.Type: GrantFiled: December 28, 2016Date of Patent: March 6, 2018Assignee: Ampleon Netherlands B.V.Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
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Publication number: 20170110343Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.Type: ApplicationFiled: December 28, 2016Publication date: April 20, 2017Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
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Patent number: 9570323Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.Type: GrantFiled: September 4, 2014Date of Patent: February 14, 2017Assignee: Ampleon Netherlands B.V.Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
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Patent number: 9190350Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.Type: GrantFiled: September 5, 2014Date of Patent: November 17, 2015Assignee: NXP B.V.Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
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Patent number: 9184469Abstract: A battery comprises a carrier foil, with solid state battery elements spaced along the foil and mounted on opposite sides of the foil in pairs, with the battery elements of a pair mounted at the same position along the foil. The carrier foil is folded to define a meander pattern with battery element pairs that are adjacent each other along the foil arranged back to back.Type: GrantFiled: November 2, 2011Date of Patent: November 10, 2015Assignee: NXP B.V.Inventors: Friso Jacobus Jedema, Willem Frederik Adrianus Besling, Freddy Roozeboom, René Wilhelmus Johannes Maria van den Boomen, Freek Egbert van Straten
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Publication number: 20150084174Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.Type: ApplicationFiled: September 4, 2014Publication date: March 26, 2015Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
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Publication number: 20150084175Abstract: For so called film assisted moulding (FAM) device processing techniques there is provided lead frame for a semiconductor device, comprising a base portion and a connection lead, said base portion arranged for mounting a semiconductor die, said connection lead comprising a horizontal portion for external connection and an angled portion for connection to said semiconductor die, wherein the angled portion has a positive angle with respect to the base portion. The connection lead may comprise a recessed portion.Type: ApplicationFiled: September 5, 2014Publication date: March 26, 2015Inventors: Freek Egbert van Straten, Jeremy Joy Montalbo Incomio, Albertus Reijs
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Patent number: 8854277Abstract: A millimeter-wave radio antenna module (600) comprising: an antenna substrate (603) having an antenna (602) provided on a face thereof; and a semiconductor die (601) comprising a wireless system IC, the die mounted on a face of the antenna substrate and configured to provide a signal to the antenna, wherein a ball grid array (605) is formed on a face of the antenna substrate for mounting the antenna module to a circuit board, the ball grid array being configured to define an air dielectric gap (606) between the antenna and the circuit board.Type: GrantFiled: November 16, 2009Date of Patent: October 7, 2014Assignee: NXP, B.V.Inventors: Antonius Johannes Matheus De Graauw, Freek Egbert Van Straten
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Publication number: 20120116189Abstract: A battery comprises a carrier foil, with solid state battery elements spaced along the foil and mounted on opposite sides of the foil in pairs, with the battery elements of a pair mounted at the same position along the foil. The carrier foil is folded to define a meander pattern with battery element pairs that are adjacent each other along the foil arranged back to back.Type: ApplicationFiled: November 2, 2011Publication date: May 10, 2012Applicant: NXP B.V.Inventors: Friso Jacobus Jedema, Willem Frederik Adrianus Besling, Freddy Roozeboom, René Wilhelmus Johannes Maria van den Boomen, Freek Egbert van Straten
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Publication number: 20110285606Abstract: A millimetre-wave radio antenna module (600) comprising: an antenna substrate (603) having an antenna (602) provided on a face thereof; and a semiconductor die (601) comprising a wireless system IC, the die mounted on a face of the antenna substrate and configured to provide a signal to the antenna, wherein a ball grid array (605) is formed on a face of the antenna substrate for mounting the antenna module to a circuit board, the ball grid array being configured to define an air dielectric gap (606) between the antenna and the circuit board.Type: ApplicationFiled: November 16, 2009Publication date: November 24, 2011Applicant: NXP B.V.Inventors: Antonius Johannes Matheus De Graauw, Freek Egbert Van Straten
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Patent number: 7394994Abstract: An optical receiver circuit comprising an optical converter circuit (38), comprising a photodiode and converting optical power into electrical power, a sensor circuit for deriving a control voltage VCONTR as a characteristic value of the electrical power output by the optical converter circuit (38); and an attenuator circuit (44) having a variable attenuation, the attenuation being controlled by the characteristic value of the electrical power output by the sensor circuit so as to obtain a constant output signal level of the optical receiver circuit. An output circuit is also provided and comprises a matching network (46), an amplifier stage (48) and an output transformer (50).Type: GrantFiled: July 1, 2003Date of Patent: July 1, 2008Assignee: NXP B.V.Inventors: Joost Maarten Zitzmann, Freek Egbert Van Straten