Abstract: For the protection of electrical networks in the event of power transients, a surge arrester is employed which, independently of the value of the impedance at any time, continuously monitors and evaluates the change over time either of the measured impedance of the network or of the voltage multiplied by the cosine of the phase shift between current and voltage. Two parallel connected latch circuits store signals related to the current and voltage in the network. The difference between the signals stored in the two latch circuits is fed to a trigger circuit that controls a counter to emit a logic signal at the output terminal of the surge arrester only when the trigger circuit emits a logic signal twice in succession within a predetermined time. With this protection the electrical network is adequately protected against incorrect shutdown in the event of power transients in cooperation with any kind of short-circuit protective relay.