Abstract: In an embodiment an electric circuitry includes at least a first delay chain of a plurality of delay elements and at least a second delay chain of a plurality of delay elements being arranged on a substrate, the respective delay elements of the at least one first and second delay chains are configured to provide a propagation delay time depending on strain applied to the substrate, wherein the delay elements of the at least one first delay chain have another orientation on the substrate than the delay elements of the at least one second delay chain, and a processing circuit configured to determine a magnitude of the strain applied on the substrate based on a first signal propagation delay time of the first delay chain and a second signal propagation delay time of the second delay chain.

Abstract: In an embodiment a method for determining an electrical parameter includes charging, in parallel, a first capacitor and a second capacitor from a common supply voltage, measuring a first discharge time by discharging the first capacitor using a comparator and a time-to-digital converter that is connected to an output of the comparator and that provides a digital output signal, measuring a second discharge time by discharging the first capacitor a second time or by discharging the second capacitor using the comparator and the time-to-digital converter and determining the electrical parameter from a ratio of the first and second discharge times.

Abstract: A circuit arrangement for resistance measurement comprises a capacitor coupled between a first potential node and a second potential node, a pair of terminals that comprises a first terminal and a second terminal, the first and second terminals being coupleable to one of the at least one resistor. The circuit arrangement further comprises a set of circuit branches comprising a first circuit branch, a second circuit branch, a third circuit branch and a fourth circuit branch, each comprising a switch switchable between a conductive state and an insulating state. The circuit arrangement further comprises the first terminal being coupled to the first potential node via the first circuit branch and the second circuit branch being connected in parallel. The circuit arrangement further comprises the second terminal being coupled to the second potential node via the third circuit branch and the fourth circuit branch being connected in parallel.

Abstract: A circuit arrangement for resistance measurement comprises a capacitor coupled between a first potential node and a second potential node, a pair of terminals that comprises a first terminal and a second terminal, the first and second terminals being coupleable to one of the at least one resistor. The circuit arrangement further comprises a set of circuit branches comprising a first circuit branch, a second circuit branch, a third circuit branch and a fourth circuit branch, each comprising a switch switchable between a conductive state and an insulating state. The circuit arrangement further comprises the first terminal being coupled to the first potential node via the first circuit branch and the second circuit branch being connected in parallel. The circuit arrangement further comprises the second terminal being coupled to the second potential node via the third circuit branch and the fourth circuit branch being connected in parallel.

Abstract: A time-to-digital converter system has at least one time-to-digital converter comprising an oscillator, a counter being driven by the oscillator, an evaluation block connected to the counter and configured for determining a time difference associated with a start signal and a stop signal, and a histogram block with a number of bins for recording entries associated with the time difference. The system can be calibrated by operating or preparing to operate the time-to-digital converter system with a measurement clock signal defining a measurement interval, providing a calibration clock signal having a frequency higher than the measurement clock signal by a predefined ratio, using a selected clock edge of the calibration clock signal as the start signal and a subsequent clock edge of the calibration clock signal as the stop signal. The evaluation block determines a calibration time difference based on the respective clock edges of the calibration clock signal used as the start signal and the stop signal.

Abstract: A time-to-digital converter arrangement has a ring oscillator with a plurality of inverting elements and a first and a second counter coupled to the ring oscillator. The first counter is configured to increment a first counter value if a positive edge transition is present at one of the inverting elements. The second counter is configured to increment a second counter value if a negative edge transition is present at the one of the inverting elements. A storage element stores the first and the second counter value and logical states of the plurality of inverting elements. A decoder coupled to the storage element selects one of the first and the second counter value as a valid value based on an evaluation of the stored logical states, and outputs a total counter value based on the valid value and the stored logical states.

Abstract: A method for determining an electrical parameter comprises charging, in parallel, a first and a second capacitor from a common supply voltage. Then, a first discharge time is determined by discharging the first capacitor. Furthermore, a second discharge time is determined by discharging the first capacitor a second time or by discharging the second capacitor. Finally, the electrical parameter is determined from a ratio of the first and the second discharge times.

Abstract: A time-to-digital converter arrangement has a ring oscillator with a plurality of inverting elements and a first and a second counter coupled to the ring oscillator. The first counter is configured to increment a first counter value if a positive edge transition is present at one of the inverting elements. The second counter is configured to increment a second counter value if a negative edge transition is present at the one of the inverting elements. A storage element stores the first and the second counter value and logical states of the plurality of inverting elements. A decoder coupled to the storage element selects one of the first and the second counter value as a valid value based on an evaluation of the stored logical states, and outputs a total counter value based on the valid value and the stored logical states.

Abstract: A time-to-digital converter system has at least one time-to-digital converter comprising an oscillator, a counter being driven by the oscillator, an evaluation block connected to the counter and configured for determining a time difference associated with a start signal and a stop signal, and a histogram block with a number of bins for recording entries associated with the time difference. The system can be calibrated by operating or preparing to operate the time-to-digital converter system with a measurement clock signal defining a measurement interval, providing a calibration clock signal having a frequency higher than the measurement clock signal by a predefined ratio, using a selected clock edge of the calibration clock signal as the start signal and a subsequent clock edge of the calibration clock signal as the stop signal. The evaluation block determines a calibration time difference based on the respective clock edges of the calibration clock signal used as the start signal and the stop signal.

Abstract: A method for the temperature compensation of a resistance measuring bridge, such as in particular a Wheatstone bridge, is characterized in that a capacitor positioned between the input circuit and a resistance switching circuit of the Wheatstone bridge is successively discharge by means of at least one Wheatstone bridge resistor. In a device for the temperature compensation of a measuring bridge, particularly a Wheatstone bridge, having a measuring bridge and a compensating resistor in the input circuit, one or two switches are located in the resistance switching circuit branch of the measuring bridge as a contact point with the latter and a capacitor is located between the input circuit and the resistance switching circuit branch.