Patents by Inventor Fritz Rothacher

Fritz Rothacher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of fabricating an integrated circuit with stress enhancement
    Patent number: 7932542
    Abstract: A method of fabricating an integrated circuit including arranging a plurality of cells to form a desired floor plan of the integrated circuit, wherein each cell comprises at least one transistor, forming a plurality of circuit constituents from the plurality of cells of the floor plan, wherein each circuit constituent comprises at least one cell and belongs to one of a plurality circuit constituent types, and applying mechanical stress to channel regions of the at least one transistor of each cell based on the circuit constituent type of the circuit constituent to which the cell belongs.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: April 26, 2011
    Assignee: Infineon Technologies AG
    Inventors: Joerg Berthold, Winfried Kamp, Fritz Rothacher
  • METHOD OF FABRICATING AN INTEGRATED CIRCUIT WITH STRESS ENHANCEMENT
    Publication number: 20090079023
    Abstract: A method of fabricating an integrated circuit including arranging a plurality of cells to form a desired floor plan of the integrated circuit, wherein each cell comprises at least one transistor, forming a plurality of circuit constituents from the plurality of cells of the floor plan, wherein each circuit constituent comprises at least one cell and belongs to one of a plurality circuit constituent types, and applying mechanical stress to channel regions of the at least one transistor of each cell based on the circuit constituent type of the circuit constituent to which the cell belongs.
    Type: Application
    Filed: September 24, 2007
    Publication date: March 26, 2009
    Inventors: Joerg Berthold, Winfried Kamp, Fritz Rothacher