Patents by Inventor Fritz Scheidel

Fritz Scheidel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4104676
    Abstract: The present invention is directed to a semiconductor device comprising a body of semiconductor material having at least one p-n junction therein. The body of semiconductor material has opposed, flat, substantially parallel main faces and an edge portion extending between the two main faces. The p-n junction is exposed at the edge portion of the body. Metal electrodes are affixed to at least a portion of the two faces of the body of semiconductor material. A layer of protective material covers the edge portion, the metal electrodes, and any exposed portions of the two main faces of the body. Electrical contacts made to the body of semiconductor material by lead electrodes in compression bonded contact with the metal electrodes and in some cases with at least a portion of the main faces of the body of semiconductor material. The surface of the lead electrodes in contact with the metal electrodes and in some instances the main faces of the semiconductor body is comprised of a plurality of lands and grooves.
    Type: Grant
    Filed: December 13, 1976
    Date of Patent: August 1, 1978
    Assignee: Siemens Aktiengesellschaft
    Inventors: Klaus Bednorz, Jon W. Johansen, Fritz Scheidel
  • Patent number: 4086614
    Abstract: A semiconductor device is described having a body of silicon semiconductor material containing at least one PN junction therein, which PN junction terminates at a peripheral edge surface of the body. A double-layer passivating and protective coating is applied to the edge of the body covering the portion where the PN junction emerges. The inner layer consists of SiO.sub.2 and a predetermined percentage of Al.sub.2 O.sub.3. The outer layer consists of SiO.sub.2 and a predetermined percentage of Al.sub.2 O.sub.3 which exceeds the percentage of Al.sub.2 O.sub.3 in the inner layer.
    Type: Grant
    Filed: October 24, 1975
    Date of Patent: April 25, 1978
    Assignee: Siemens Aktiengesellschaft
    Inventor: Fritz Scheidel
  • Patent number: 4047286
    Abstract: A process for the production of semiconductor elements is set forth which includes metallizing a side of a large-area semiconductor wafer, having at least two zones of differing conductivity types, applying a soft-solder plate to the metallized side of said large-area wafer, bringing a perforated plate with a desired pattern of holes against said soft-solder plate, said perforated plate being formed of a material which does not form an alloy with said soft-solder plate, subjecting said perforated plate to a load while said soft-solder is heated to its melting temperature, cooling said soft-solder plate and removing it, and subjecting said large-area semiconductor wafer to a sand blast which is directed against the side coated with the solder metal until the large-area wafer has been divided up. The stream of the sand on the said blast may be as wide as the large-area wafer. The metal layer formed on the large-area wafer is preferably formed as two nickel layers and a gold layer.
    Type: Grant
    Filed: May 13, 1976
    Date of Patent: September 13, 1977
    Assignee: Siemens Aktiengesellschaft
    Inventors: Udo Lob, Fritz Scheidel