Patents by Inventor Fritz W. Beyerlein

Fritz W. Beyerlein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6169322
    Abstract: The invention enables a die to be attached to a die attach pad so as to reduce delamination stress that can arise when the die and die attach pad are heated, and so as to provide support for the die at locations where bond pads are formed so that the die is not damaged by forces applied to the die during attachment of bond wires to the bond pads. The die and die attach pad so attached can be used to produce a packaged die having improved delamination characteristics, so that the cost to manufacture and/or store the packaged die can be reduced. The invention further provides die attach pads and leadframes including such die attach pads that are particularly suited to achieving the aforementioned functional characteristics.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: January 2, 2001
    Assignee: Cypress Semiconductor Corporation
    Inventors: Bo S. Chang, Fritz W. Beyerlein
  • Patent number: 4026008
    Abstract: A lead structure formed from a sheet of electrically conducting material having a plurality of spaced integral lead arrays formed therein with each of the arrays comprising a plurality of first leads formed from the sheet material in one region thereof and being integral with the sheet with each of the leads being cantilevered and having inner extremities which are free and positioned in a predetermined pattern. Portions of the first leads adjacent the free ends are convoluted. A semiconductor body having at least portions of an electrical circuit formed therein and with contacts in a predetermined pattern carried by the body and lying in a common plane is secured to each of the arrays with the contact pads being bonded to the inner extemities of the first leads. A first encapsulating means is provided for encapsulating the semiconductor body and the inner extremities of the first leads with the outer extremities of the first leads being free of the first encapsulating means.
    Type: Grant
    Filed: May 19, 1975
    Date of Patent: May 31, 1977
    Assignee: Signetics Corporation
    Inventors: Joseph M. Drees, Fritz W. Beyerlein
  • Patent number: 4017963
    Abstract: Semiconductor assembly and method in which very small pill-like packages can be mounted directly on boards and can be directly mounted in assemblies and stacks. The pill-like package encapsulates a semiconductor body having at least a portion of an electrical circuit formed therein with contact pads in a predetermined pattern carried by the body and lying in a common plane with a plurality of first leads bonded to the contact pads and the first leads extending outwardly from the semiconductor body and having outer extremities which lie in a predetermined pattern with encapsulating means encapsulating the semiconductor body and the portions of the first leads in engagement with the contact pads. The pill-like package is very small and has a spider-like conformation. The leads are formed in such a manner so that the packages can be directly mounted upon printed circuit boards without extending the leads through holes. The pill-like packages can be stacked into assemblies in which the leads are interconnected.
    Type: Grant
    Filed: May 19, 1975
    Date of Patent: April 19, 1977
    Assignee: Signetics Corporation
    Inventor: Fritz W. Beyerlein