Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system for performing echo cancellation via use of a transceiver interface circuit. In a simplified embodiment, a digital signal processor (DSP), an analog front end (AFE), a line driver, and a hybrid network are located within the circuit. The DSP is configured to process a transmit, receive, and a transmit error signal. Mathematical operations of the DSP eliminate error from the receive signal with the help of the transmit error signal. The AFE modifies the transmit, receive, and transmit error signal from analog to digital or vice-versa. The line driver amplifies the transmit signal to a power level compatible with a transmission network. The line driver further produces the transmit error signal which is created by the amplification of the transmit signal. The hybrid network receives the amplified transmit signal from the AFE and a receive signal from the transmission network, and isolates the transmit signal from the receive signal.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: An improved line driver and method for increasing the available signal transmit power on a transmission line are disclosed. The improved line driver achieves an available transmit power increase without increasing the maximum current in the line driver output stage. The output stage of the line driver may comprise a first amplifier, a second amplifier, and an integrated back-matching resistor network. In order to further increase the available transmit power; a protective semiconductor device may be added to a line driver output stage for each semiconductor device in the first and second amplifiers. A third embodiment of a line driver output stage in accordance with the present invention may comprise a combination of the integrated back-matching resistor network along with the protective semiconductor devices.

Abstract: In general, the line driver is defined by an input and output stage wherein the input stage is identified by the deriving of the open loop gain of a preamplifier and the output stage is defined by the deriving of the open loop gain of two drivers that provide power required for the line driver to drive a line. Both, the preamplifier and the drivers have inputs that sit at a common mode voltage, thereby inhibiting a common mode input voltage swing and limiting distortion in the line driver. The gain of the preamplifier may be changed to a desired value by regulating the values of resistors therein, thereby reducing distortion by maximizing the open loop gain for all lines and DSL applications. The line driver can be configured for any desired closed loop gain, regardless of whether the gain value is below or above 1. The drivers of the, output stage use a set of programmable output devices to allow for maximum drive capability of the drivers to be programmed under digital control.

Abstract: An improved line driver and method for increasing the available signal transmit power on a transmission line are disclosed. The improved line driver achieves an available transmit power increase by limiting the output stage signal path to NMOS and NPN bipolar semiconductor devices. The output stage of the improved line driver may comprise a first amplifier, a second amplifier, a first transformer, a second transformer, and a plurality of back-matching resistor networks. A second embodiment of an improved output stage of a line driver may comprise a first amplifier, a second amplifier, a transformer, and a plurality of back-matching resistor networks. Both preferred embodiments may be implemented with CMOS and bipolar semiconductor devices, as well as, a combination of the two semiconductor technologies.

Abstract: A system and method for providing automatic compensation of IC design parameters that vary as a result of natural process variation is disclosed. In a simplified embodiment, the difference in voltages, &Dgr;VGS, between two identical diode-connected MOSFETs, which are biased with currents that are known to be different in value, is determined. &Dgr;VGS, is inversely proportional to the transconductance of the first of the two diode-connected MOSFETs, which is also biased with a current, ID. A relationship that embodies a direct proportionality between the transconductance of the first diode-connected MOSFET and a circuit performance parameter is derived, thereby establishing a relationship between &Dgr;VGS and the circuit performance parameter. Process compensation is then implemented, comparing known reference voltages with &Dgr;VGS.

Abstract: An improved line driver and method for increasing the available signal transmit power on a transmission line are disclosed. The improved line driver achieves an available transmit power increase without increasing the maximum current in the line driver output stage. The output stage of the line driver may comprise a first amplifier, a second amplifier, and an integrated back-matching resistor network. In order to further increase the available transmit power; a protective semiconductor device may be added to a line driver output stage for each semiconductor device in the first and second amplifiers. A third embodiment of a line driver output stage in accordance with the present invention may comprise a combination of the integrated back-matching resistor network along with the protective semiconductor devices.

Abstract: In general, the multi-mode analog front-end provides an internal line driver and hybrid, as well as numerous functions, in order to provide a close to optimum solution for all digital subscriber line applications. The functions provided for by the analog front-end include; programmable hybrid attenuation; onboard amplifiers for driving external transmit and receive filters; a line driver with programmable drive and gain; programmable RC-filters capable of calibration via an internal loop-back under digital control; a programmable switched-capacitor filter for tracking the over sampling rate used by a digital signal processor; internal testing functions; a high frequency boost circuit; a dual input peak detector; selectable data rates; and a programmable data interface. The analog front-end allows for use of particular blocks within the analog front-end particular to the functions necessary to compensate for a particular digital subscriber line application.

Abstract: A system and method for force-starting a voltage and current controlled element is disclosed. In a simplified embodiment, a power source is coupled to the controlled element via a start-up circuit. The start-up circuit supplies a current, or voltage, to the controlled element, responsive to the voltage or current level at a specified node being below a threshold level. Preferably, two diode-connected devices may be utilized, thereby providing current forcing capability when the voltage level at the specified node is below a threshold voltage level, as specified by the diode-connected devices.

Abstract: In general, the reference voltage stabilizer provides a system and method of stabilizing a reference voltage regardless of the sampling rate of a sample data system. An amplifier is utilized to amplify the reference voltage so as to maintain voltage level by stabilizing and isolating the initial reference voltage. A programmable current is utilized to modify the amplified reference voltage, thereby compensating for adjustment in current level of the reference voltage caused by system sampling. The programmable current may also be utilized to compensate for reference voltage errors occurring before amplification, by adding an intentional offset between required sink and source currents, and the current supplied by the programmable current.

Abstract: A linearized resistor for integrated circuits combines an N-type diffused resistor and a P-type diffused resistor. In one embodiment, the N-type and P-type diffused resistors are connected in series. In another embodiment, the N-type and P-type diffused resistors are connected in parallel. Two or more linearized resistors of the present invention may be used in IC circuits, such as voltage dividers, inverting amplifiers, single-ended operational amplifiers, and single-ended differential operational amplifiers. Linearized resistors of the present invention can be designed to have voltage coefficients smaller than conventional IC resistors having a single diffused resistor. As such, linearized resistors of the present invention can be designed to provide more uniform resistance over their operating voltage range than conventional IC resistors.

Abstract: A reference voltage source has at least one transistor having a base, emitter and collector electrode operating in an active state that has an inherent voltage drop between its base and emitter electrodes to generate a low noise core voltage which is applied to the input of an amplifier to set the amplifier operating point, and thereby the amplifier output, which is the reference voltage. The reference voltage is temperature compensated by providing the amplifier with a feedback loop, or by altering the core voltage applied to the amplifier, or by altering the gain of the amplifier. Several transistors can be connected in series and their base to emitter voltage drops added to change the core voltage value.