Abstract: An automatic gain control (AGC) method according to the present invention applies an initial gain by a digital AGC circuit in a timeslot is determined using a final calculated gain from the same timeslot in the previous frame together with an offset factor. An erase function is activated for a given data sample block when the number of saturated data samples that are detected within the block exceeds a threshold value. The power measurement made by the AGC circuit and used to update the gain is adjusted based on the number of measured data samples that are saturated. These elements provide a gain limiting function and allows limiting of the dynamic range for further signal processing.

Abstract: A receiver for generating a soft threshold value for use in measuring the power of a received signal includes a correlator, an automatic gain controller, a noise level measuring device, and a soft threshold device. The correlator is configured to receive the signal as an input and to produce a correlated signal. The automatic gain controller is configured to receive the signal as an input and to produce a gain control value. The noise level measuring device is configured to receive the signal as an input and to produce a noise level measurement. The soft threshold device is configured to receive the gain control value and the noise level measurement as inputs and to produce a soft threshold value. The soft threshold device is further configured to apply the soft threshold value to the correlated signal and to discard any correlated signals that are below the soft threshold value.

Abstract: A received power of a code division multiple access (CDMA) signal is determined. Samples of a spectrum associated with the received CDMA signal are taken as received samples, which are then correlated with a code of the CDMA signal. For correlated samples below a first threshold, those correlated samples are processed by being made to be zero. For samples between the first threshold and a second threshold, those correlated samples are processed by rescaling. The correlated samples above the second threshold are passed unchanged. The received power level of the received CDMA signal is determined using the correlated samples after the processing.

Abstract: A communication system emulator digitally emulates a plurality of signal impairments created by the transmitter and receiver components and communication medium in a typical communication system, for use in evaluating and refining modem design. A variety of linear and non-linear distortion characteristics are impressed on baseband signals between modulators and demodulators to evaluate and refine modem performance without requiring transmission frequency components or communication channel. The emulator comprises transmit modules, receive modules and communication media modules, and can accept or output analog or digital signals. Each module is configurable to allow modeling of simplex or duplex communication, or a common base station with multiple users transmitting or receiving, all configurations with or without communication media impairment emulation. Each module can be configured to add a plurality of linear and non-linear impairments to a baseband signal.

Abstract: The present invention is related to a method and apparatus for adaptively selecting local oscillator (LO) and sampling frequencies for analog-to-digital conversion of a plurality of input signals for transmitting two or more services via two or more frequency bands. Each input signal carries a different service via a different frequency band. Each service is subject to a minimum signal-to-interference, noise and distortion ratio (SINAD) requirement. The input signals are converted to an intermediate frequency (IF) band signals by mixing the input signals with LO signals. The LO and sampling frequencies are adjusted such that the converted IF band signals of the input signals are spectrally adjacent or overlapping each other to some degree. SINAD of the services is measured at each of a plurality of spectrally overlapping conditions. The LO frequencies and the sampling frequency are then adjusted based on the SINAD measurement results.

Abstract: Apparatus for reducing adjacent channel interference between proximate wireless communication units. Each wireless communication unit includes a digital baseband circuit and an analog baseband circuit. The digital baseband circuit includes at least one group delay compensation equalizer and at least one finite-impulse response (FIR) filter. The analog baseband circuit includes a radio (transmitter section), a power amplifier and a narrowband filter. The narrowband filter compensates for deficiencies of the power amplifier including distortion and radio frequency (RF) power spill over. The group delay compensation filter compensates for undesired characteristics (e.g., group delay variation) exhibited by the narrowband filter.

Abstract: An automatic gain control (AGC) method according to the present invention applies an initial gain by a digital AGC circuit in a timeslot is determined using a final calculated gain from the same timeslot in the previous frame together with an offset factor. An erase function is activated for a given data sample block when the number of saturated data samples that are detected within the block exceeds a threshold value. The power measurement made by the AGC circuit and used to update the gain is adjusted based on the number of measured data samples that are saturated.

Abstract: A received power of a code division multiple access (CDMA) signal is determined. Samples of a spectrum associated with the received CDMA signal are taken as received samples, which are then correlated with a code of the CDMA signal. For correlated samples below a first threshold, those correlated samples are processed by being made to be zero. For samples between the first threshold and a second threshold, those correlated samples are processed by rescaling. The correlated samples above the second threshold are passed unchanged. The received power level of the received CDMA signal is determined using the correlated samples after the processing.

Abstract: A clocking mechanism with improved fault tolerance for synchronizing a distributed processing system includes a plurality of distributed clock sources. Each clock source may operate as a master clock for synchronizing the operations of the entire system or as a slave to an external clock while remaining available, in a backup capacity, to operate as a master clock in the event of a failure in the previous master clock. A clock selection mechanism is provided in each distributed switch element for selecting the best clock available to each switch element for synchronization. A failure recovery mechanism is provided with fast and automatic recovery in the event of a failure in a master clock. A data extraction mechanism is also provided capable of sampling a bit stream that is not phase-aligned, even in the presence of timing jitter and pulse width distortion, and having provisions for detecting a bit slip.

Abstract: A clocking mechanism with improved fault tolerance for synchronizing a distributed processing system includes a plurality of distributed clock sources. Each clock source may operate as a master clock for synchronizing the operations of the entire system or as a slave to an external clock while remaining available, in a backup capacity, to operate as a master clock in the event of a failure in the previous master clock. A clock selection mechanism is provided in each distributed switch element for selecting the best clock available to each switch element for synchronization. A failure recovery mechanism is provided with fast and automatic recovery in the event of a failure in a master clock. A data extraction mechanism is also provided capable of sampling a bit stream that is not phase-aligned, even in the presence of timing jitter and pulse width distortion, and having provisions for detecting a bit slip.

Abstract: An improved real-time debugger accommodates high level language computer programs containing dynamic local data and process context switches. Information thus acquired is used to deduce the stack frame pointer. Inputs and outputs of a target processor are tapped to capture key instructions, particularly indicating context switches. A local tag memory in the debugger stores images of stack frames during context switches.