Abstract: A two-point modulation Phase-Locked Loop (PLL) has a dual-input Voltage-Controlled Oscillator (VCO). A digital data modulation signal is combined with a carrier and input to a feedback divider. The data modulation signal is also input to an offset Digital-to-Analog Converter (DAC) to generate an analog voltage to a second input of the VCO. The loop path through the VCO has a higher gain than the DAC path through the VCO, which has better linearity. A calibration unit divides the VCO output and counts pulses. The offset DAC has a data input and a gain input. During calibration, the data input of the DAC is set to minimum and then maximum values and VCO output pulses counted, and repeated for two values of the gain input to the DAC. From the four counts a K(DAC) calculator calculates the calibrated gain to apply to the gain input of the offset DAC.

Abstract: A lock mechanism includes a first mounting plate, a second mounting plate, a restricting plate, a fixing base, at least one first fixing element and at least one second fixing element. The first mounting plate and the restricting plate are mounted on one side of a door, and the second mounting plate and the fixing base are mounted on the other side of the door. The first fixing element is penetrated through the restricting plate in a direction from the restricting plate toward the second mounting plate. The second fixing element is penetrated through the fixing base in a direction from the fixing base toward the first mounting plate. The fixing base and a lock cylinder disposed on the fixing base can be disassembled and replaced by removing the second fixing element such that dismantling the whole lock mechanism is not necessary.

Abstract: A method, and the associated design, schema and techniques for processing digital data, whether random or not, through encoding and decoding losslessly and correctly for purposes of encryption/decryption or compression/decompression or both, including the use of Digital Lensing, Unlimited Code System, and other associated techniques. There is no assumption of or requirement for the digital information to be processed before processing.

Abstract: A lock mechanism includes a first mounting plate, a second mounting plate, a restricting plate, a fixing base, at least one first fixing element and at least one second fixing element. The first mounting plate and the restricting plate are mounted on one side of a door, and the second mounting plate and the fixing base are mounted on the other side of the door. The first fixing element is penetrated through the restricting plate in a direction from the restricting plate toward the second mounting plate. The second fixing element is penetrated through the fixing base in a direction from the fixing base toward the first mounting plate. The fixing base and a lock cylinder disposed on the fixing base can be disassembled and replaced by removing the second fixing element such that dismantling the whole lock mechanism is not necessary.

Abstract: A Quadrature-In, Quadrature-Out (QIQO) clock divider divides by an odd divisor, such as three. An IQ input clock has in-phase and quadrature differential signals. Four stages of dynamic logic are arranged into a loop, with each stage output being one of four IQ output signals that have 90-degree phase separations. Each stage output drives the gates of a p-channel charging transistor and an n-channel discharging transistor of a next stage. Two p-channel charging logic transistors are in series between the next stage output and the p-channel charging transistor, and two n-channel evaluation transistors are in series between the next stage output and the n-channel discharging transistor. Different pairs of the four IQ input clock signals are applied to their gates. When the prior stage output is low, the stage output is charged. When the prior stage output is high, the stage output discharge timing is determined by the IQ signals.

Abstract: A Token Key Infrastructure and a method using Polymorphic Executable or its variants for the exchange of digital information, including digital data and digital executable codes, over network or internet in a secure way with the use of Dynamism, Polymorphism and Dynamic Polymorphism, as well as integrating with Public Key Infrastructure where considered appropriate for the protection of intellectual property rights, privacy and confidentiality of digital information.

Abstract: Techniques for identifying clusters of user interactions and shopping missions may be provided. For example, the system may receive a history of interactions between a user and one or more network pages. The system may identify a most recent event from the history of interactions and identify a cluster that includes other events from the history of interactions that are of a same category as the most recent event. The determination of the cluster may be based in part on item attributes associated with the item presented on the at least one of the one or more network pages. The most recent event may then be associated with the cluster. In some examples, a shopping mission is determined and one or more notifications are provided to a user, merchant, or electronic marketplace in association with the identified shopping mission.

Abstract: Method for connecting mass storage device(s) with data connection device(s) connecting to data port(s) with the same data interface type(s) as that of the mass storage device(s) for data transmission and with power connection device(s) connecting to power port(s), for power supply, on a bus of technologies with power management capabilities and facilities in computer-related or computer-controlled or operating-system-controlled machines or devices for using and swapping the mass storage device(s).

Abstract: A framework and the associated method, schema and design for processing digital data, whether random or not, through encoding and decoding losslessly and correctly for purposes including the purposes of encryption/decryption or compression/decompression or both. There is no assumption of the digital information to be processed before processing. An universal coder is invented and now pigeonhole meets blackhole.

Abstract: A semiconductor device, a memory device, and a manufacturing method of the same are provided. The memory device includes a substrate, a floating gate, a gate insulation layer, an inter-gate dielectric layer, and a control gate. The control gate is a multi-layer structure with three or more layers, and at least one layer of the multi-layer structure is a metal silicide layer.

Abstract: A Phase-Locked Loop (PLL) has a multi-curve voltage-controlled oscillator (VCO) with a curve-select input that adjusts the capacitance within the VCO and thus the VCO gain. A calibration unit generates a curve-select value to the VCO. Coarse calibration selects a Center Curve CC value using binary search of the curve-select bits. During fine calibration, the number of pulses of the VCO output are counted and stored for all curves in a target window around the center curve. The stored pulse counts are compared to an ideal pulse count for a specified frequency, and the curve-select value for the closest-matching pulse count is applied to the VCO. The target window is much smaller than all possible curves, so calibration is performed only on a few curves, reducing calibration time. A switch before the VCO opens the loop for faster open-loop calibration. Pulses are counted digitally without expensive analog comparators.

Abstract: A two-point modulation Phase-Locked Loop (PLL) has a gain-adjustable voltage-controlled oscillator (VCO). A digital data modulation signal is combined with a carrier and input to a feedback divider. The data modulation signal is also input to a Digital-to-Analog Converter (DAC) to generate an analog voltage to a second input of the VCO. A calibration unit divides the VCO output and counts pulses. During calibration, the data modulation signal is set to minimum and then maximum values and VCO output pulses counted. A count difference for the data modulation signal at maximum and minimum values is input to a Look-Up Table (LUT) to read out a gain calibration value. During normal operation mode, the gain calibration value from the LUT is applied to a second input of the DAC, which drives the VCO to adjust VCO gain. A switch before the VCO opens the loop for faster open-loop calibration.

Abstract: The present inventions relates to methods and assays to predict the response of an individual to psychiatric treatment and to a method to improve medical treatment of a disorder, which responsive to treatment with a psychiatric treatment.

Abstract: The present inventions relates to methods and assays to predict the response of an individual to an analgesic treatment and to a method to improve medical treatment of a disorder, which is responsive to treatment with an analgesic.

Abstract: A Token Key Infrastructure and a method using Polymorphic Executable or its variants for the exchange of digital information, including digital data and digital executable codes, over network or internet in a secure way with the use of Dynamism, Polymorphism and Dynamic Polymorphism, as well as integrating with Public Key Infrastructure where considered appropriate for the protection of intellectual property rights, privacy and confidentiality of digital information.

Abstract: A method of fabricating a semiconductor device is provided. A stack layer is formed on a substrate. The stack layer is patterned to form a plurality of stack structures extending in a first direction. A trench extending in the first direction is located between two adjacent stack structures. Each trench has a plurality of wide portions and a plurality of narrow portions. A maximum width of the wide portions in a second direction is larger than a maximum width of the narrow portions in the second direction. A charge storage layer is formed to cover a bottom surface and sidewalls of the wide portion and fill up the narrow portion. A conductive layer is formed to fill up the wide portion. A semiconductor device formed by the method is also provided.

Abstract: The present inventions relates to methods and assays to predict the response of an individual to a psychiatric treatment and to a method to improve medical treatment of a disorder, which is responsive to treatment with a psychiatric treatment.

Abstract: The present inventions relates to methods and assays to predict the response of an individual to an analgesic treatment and to a method to improve medical treatment of a disorder, which is responsive to treatment with an analgesic.

Abstract: A method of fabricating a semiconductor device is provided. A stack layer is formed on a substrate. The stack layer is patterned to form a plurality of stack structures extending in a first direction. A trench extending in the first direction is located between two adjacent stack structures. Each trench has a plurality of wide portions and a plurality of narrow portions. A maximum width of the wide portions in a second direction is larger than a maximum width of the narrow portions in the second direction. A charge storage layer is formed to cover a bottom surface and sidewalls of the wide portion and fill up the narrow portion. A conductive layer is formed to fill up the wide portion. A semiconductor device formed by the method is also provided.

Abstract: In OLEDs, improved efficiency is obtained by compounds which can form inter alia electron injection layers of the formula (I) wherein R1 is a 1-5 ring aryl (including polycyclic), aralkyl or heteroaryl group which is optionally substituted with one or more C1-C4 alkyl, alkoxy or cyano; R2 and R3 together form a 1-5 ring aryl (including polycyclic), aralkyl or heteroaryl group which is optionally substituted with C1-C4 alkyl, alkoxy or cyano; R4 is hydrogen, C1-C4 alkyl or aryl; and Ar is monocyclic, bicyclic or tricyclic aryl or heteroaryl which is optionally substituted with one or more C1-C4-alkyl or alkoxy groups, or an oligomer thereof.