Abstract: A method of fabricating a semiconductor structure includes forming an alignment mark layer on a substrate; patterning the alignment mark layer for forming at least one alignment mark feature; forming a bottom conductive layer on the patterned alignment mark layer in a substantially conformal manner; forming an insulator layer on the bottom conductive layer; and forming a top conductive layer on the insulator layer.

Abstract: A method of forming a semiconductor structure is provided. Two wafers are first bonded by oxide bonding. Next, the thickness of a first wafer is reduced using an ion implantation and separation approach, and a second wafer is thinned by using a removal process. First devices are formed on the first wafer, and a carrier is then attached over the first wafer, and an alignment process is performed from the bottom of the second wafer to align active regions of the second wafer for placement of the second devices with active regions of the first wafer for placement of the first devices. The second devices are then formed in the active regions of the second wafer. Furthermore, a via structure is formed through the first wafer, the second wafer and the insulation layer therebetween to connect the first and second devices on the two sides of the insulation layer.

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

Abstract: The present disclosure describes a method to form a semiconductor structure having an oxide structure on a wafer edge. The method includes forming a device layer on a first substrate, forming an interconnect layer on the device layer, forming an oxide structure on a top surface and along a sidewall surface of the interconnect layer, forming a bonding layer on the oxide structure and the interconnect layer, and bonding the device layer to a second substrate with the bonding layer.

Abstract: A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures. The semiconductor device further includes a gate structure. The gate structure includes a first sidewall and a second sidewall angled with respect to the first sidewall. The gate structure further includes a first surface extending between the first sidewall and the second sidewall, wherein a dimension of the gate structure in a first direction is less than a dimension of each of the plurality of isolation structures in the first direction.

Abstract: An image sensor device includes nanostructures for improving light absorption efficiency. The image sensor device includes a substrate, a light absorption region, and a nanostructure array. The light absorption region is over the substrate. The nanostructure array us over the light absorption region. The nanostructure array includes a plurality of nanostructures repeatedly arranged from a top view.

Abstract: A method includes bonding a first wafer to a second wafer. The first wafer includes a plurality of dielectric layers, a metal pipe penetrating through the plurality of dielectric layers, and a dielectric region encircled by the metal pipe. The dielectric region has a plurality of steps formed of sidewalls and top surfaces of portions of the plurality of dielectric layers that are encircled by the metal pipe. The method further includes etching the first wafer to remove the dielectric region and to leave an opening encircled by the metal pipe, extending the opening into the second wafer to reveal a metal pad in the second wafer, and filling the opening with a conductive material to form a conductive plug in the opening.

Abstract: A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures in a first direction. The semiconductor device further includes a gate structure. The gate structure includes a top surface; a first sidewall angled at a non-perpendicular angle with respect to the top surface; and a second sidewall angled with respect to the top surface. The gate structure further includes a first horizontal surface extending between the first sidewall and the second sidewall, wherein the first horizontal surface is parallel to the top surface, and a dimension of the gate structure in a second direction, perpendicular to the first direction, is less than a dimension of each of the plurality of isolation structures in the second direction.

Abstract: A semiconductor device includes a substrate, a photo sensing region, and a plurality of semiconductor plugs. The photo sensing region is in the substrate. The photo sensing region forms a p-n junction with the substrate. The semiconductor plugs extend from above the photo sensing region into the photo sensing region.

Abstract: A method of making an image sensor includes depositing a shield layer over a substrate, wherein the substrate comprises a first photodiode (PD) and a second PD. The method further includes etching the shield layer to define a first recess aligned with the first PD and a second recess aligned with the second PD. The method further includes depositing a flicker reduction layer in the first recess and in the second recess. The method further includes etching the flicker reduction layer to remove the flicker reduction layer from the first recess.

Abstract: A method of forming a semiconductor structure is disclosed. A multi-layer structure is formed over a substrate. A photoresist stack with a stepped sidewall is formed on the multi-layer structure. A pattern of the photoresist stack is transferred to the multi-layer structure.

Abstract: An image sensor device includes a substrate, a deep-trench isolation structure, an oxide layer, a light blocking structure, and an adhesion layer. The substrate has a photosensitive region. The deep-trench isolation structure is in the substrate and adjacent the photosensitive region. The oxide layer is over the photosensitive region and the deep-trench isolation structure. The light blocking structure is over the oxide layer. A bottom portion of the light blocking structure is embedded in the oxide layer. The adhesion layer is between the light blocking structure and the oxide layer. The adhesion layer extends beyond a sidewall of a top portion of the light blocking structure.

Abstract: Photosensors may be formed on a front side of a semiconductor substrate. An optical refraction layer having a first refractive index may be formed on a backside of the semiconductor substrate. A grid structure including openings is formed over the optical refraction layer. A masking material layer is formed over the grid structure and the optical refraction layer. The masking material layer may be anisotropically etched using an anisotropic etch process that collaterally etches a material of the optical refraction layer and forms non-planar distal surface portions including random protrusions on physically exposed portions of the optical refraction layer. An optically transparent layer having a second refractive index that is different from the first refractive index may be formed on the non-planar distal surface portions of the optical refraction layer. A refractive interface refracts incident light in random directions, and improves quantum efficiency of the photosensors.

Abstract: An image sensor includes a substrate and a first photodiode (PD) having a first size in the substrate. The image sensor further includes a second PD having a second size in the substrate, wherein the first size is different from the second size. The image sensor further includes a first buffer layer over the substrate. The image sensor further includes a shield layer over the first buffer, wherein the first buffer layer and the shield layer define a first recess aligned with the first PD and a second recess aligned with the second PD. The image sensor further includes a flicker reduction layer in the first recess, wherein the second recess is free of the flicker reduction layer.

Abstract: An image sensor device includes a substrate, a deep-trench isolation structure, a buffer layer, and a light blocking structure. The substrate has a photosensitive region. The deep-trench isolation structure is in the substrate and adjacent the photosensitive region. The buffer layer is over the photosensitive region and the deep-trench isolation structure. The light blocking structure is over the buffer layer. A bottom portion of the light blocking structure is embedded in the buffer layer.

Abstract: A semiconductor device includes a substrate, a photo sensing region, and a plurality of semiconductor plugs. The photo sensing region is in the substrate. The photo sensing region forms a p-n junction with the substrate. The semiconductor plugs extend from above the photo sensing region into the photo sensing region.

Abstract: Photosensors may be formed on a front side of a semiconductor substrate. An optical refraction layer having a first refractive index may be formed on a backside of the semiconductor substrate. A grid structure including openings is formed over the optical refraction layer. A masking material layer is formed over the grid structure and the optical refraction layer. The masking material layer may be anisotropically etched using an anisotropic etch process that collaterally etches a material of the optical refraction layer and forms non-planar distal surface portions including random protrusions on physically exposed portions of the optical refraction layer. An optically transparent layer having a second refractive index that is different from the first refractive index may be formed on the non-planar distal surface portions of the optical refraction layer. A refractive interface refracts incident light in random directions, and improves quantum efficiency of the photosensors.

Abstract: A semiconductor device includes a semiconductor substrate, a photo sensing region, and a plurality of nanostructures. The semiconductor substrate has a first dopant. The photo sensing region is embedded in the semiconductor substrate, has a top surface level with a top surface of the semiconductor substrate, and has a second dopant that is of a different conductivity type than the first dopant. The plurality of nanostructures is on the photo sensing region and is made of a material the same as the photo sensing region.

Abstract: Photosensors may be formed on a front side of a semiconductor substrate. An optical refraction layer having a first refractive index may be formed on a backside of the semiconductor substrate. A grid structure including openings is formed over the optical refraction layer. A masking material layer is formed over the grid structure and the optical refraction layer. The masking material layer may be anisotropically etched using an anisotropic etch process that collaterally etches a material of the optical refraction layer and forms non-planar distal surface portions including random protrusions on physically exposed portions of the optical refraction layer. An optically transparent layer having a second refractive index that is different from the first refractive index may be formed on the non-planar distal surface portions of the optical refraction layer. A refractive interface refracts incident light in random directions, and improves quantum efficiency of the photo sensors.

Abstract: A method of fabricating a semiconductor structure includes forming an alignment mark layer on a substrate; patterning the alignment mark layer for forming at least one alignment mark feature; forming a bottom conductive layer on the patterned alignment mark layer in a substantially conformal manner; forming an insulator layer on the bottom conductive layer; and forming a top conductive layer on the insulator layer.