Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.

Abstract: The present disclosure discloses an object detection method used in an object detection apparatus that includes the steps outlined below. An image signal received from an image sensor is detected to generate an image detection signal when an image variation is detected. An infrared signal received from an infrared sensor is detected to generate an infrared detection signal when an infrared energy variation is detected. A time counting process is initialized when the image detection signal is generated. An object detection signal is generated when the infrared detection signal is generated within a predetermined time period after the time counting process is initialized. A detection distance of the image sensor is larger than a detection distance of the infrared sensor.

Abstract: The present disclosure discloses a dual-processor electronic apparatus operation method used in a dual-processor electronic apparatus that includes steps outlined below. A first processor is activated in an initialization procedure. A second processor is activated by the first processor to enter an operation mode. The first processor is deactivated in the operation mode, and the second processor executes a predetermined procedure. Whether a predetermined event occurs during the execution of the predetermined procedure is determined by the second processor such that event information is stored when the predetermined event occurs and the first processor is activated. The event information is accessed and processed by the first processor.

Abstract: The present disclosure discloses a dual-processor electronic apparatus operation method used in a dual-processor electronic apparatus that includes steps outlined below. A first processor is activated in an initialization procedure. A second processor is activated by the first processor to enter an operation mode. The first processor is deactivated in the operation mode, and the second processor executes a predetermined procedure. Whether a predetermined event occurs during the execution of the predetermined procedure is determined by the second processor such that event information is stored when the predetermined event occurs and the first processor is activated. The event information is accessed and processed by the first processor.

Abstract: The present disclosure discloses an object detection method used in an object detection apparatus that includes the steps outlined below. An image signal received from an image sensor is detected to generate an image detection signal when an image variation is detected. An infrared signal received from an infrared sensor is detected to generate an infrared detection signal when an infrared energy variation is detected. A time counting process is initialized when the image detection signal is generated. An object detection signal is generated when the infrared detection signal is generated within a predetermined time period after the time counting process is initialized. A detection distance of the image sensor is larger than a detection distance of the infrared sensor.

Abstract: A packaging structure is provided. The packaging structure includes a plurality of first chips; and a molding layer between adjacent first chips. The molding layer covers a sidewall of the first chip and exposes a top surface of the first chip.

Abstract: A control method for a storage device of a driving recorder includes: configuring a directory entry of a storage device according to a predetermined directory entry stored in a storage unit; configuring a file allocation table of the storage device according to a predetermined file allocation table stored in the storage unit; and controlling a controller to write data to the storage device according to the directory entry and the file allocation table. In one embodiment, entries of the predetermined file allocation table are interleaved to accommodate multiple files and still support a continuous write operation.

Abstract: A control method for a storage device of a driving recorder includes: configuring a directory entry of a storage device according to a predetermined directory entry stored in a storage unit; configuring a file allocation table of the storage device according to a predetermined file allocation table stored in the storage unit; and controlling a controller to write data to the storage device according to the directory entry and the file allocation table. In one embodiment, entries of the predetermined file allocation table are interleaved to accommodate multiple files and still support a continuous write operation.

Abstract: A method for manufacturing the image sensor includes providing a substrate structure; forming a mask layer on the substrate structure, the mask layer having openings; depositing a metal grid material covering a surface of the mask layer and a bottom of the openings; and stripping the mask layer for removing a portion of the metal grid material on the top surface of the mask layer. The substrate structure includes: a substrate having a first surface; a plurality of pixels in the substrate; isolation structures around each of the plurality of pixels; and an anti-reflective coating on the first surface of the substrate. The openings include first openings exposing a portion of the first surface of the substrate structure above the isolation structures. A remaining portion of the metal grid material at the bottom of the openings forms metal grids.

Abstract: A packaging structure is provided. The packaging structure includes a plurality of first chips; and a molding layer between adjacent first chips. The molding layer covers a sidewall of the first chip and exposes a top surface of the first chip.

Abstract: A semiconductor structure includes providing a substrate including a first surface and a second surface opposite to the first surface. The first surface is a functional surface. The method also includes forming a plastic seal layer on the first surface of the substrate, and performing a thinning-down process on the second surface of the substrate after forming the plastic seal layer. The plastic seal layer provides support for the substrate during the thinning-down process, and thus warping or cracking of the plastic seal layer 240 may be avoided. In addition, the plastic seal layer can also be used as a material for packaging the substrate. Therefore, after the thinning-down process, the plastic seal layer does not need to be removed. As such, the fabrication process is simplified, and the production cost is reduced.

Abstract: A packaging structure and a method for fabricating the packaging structure are provided. The method includes providing a wafer. The wafer has a first surface and a second surface opposing to the first surface, and the wafer includes a plurality of first chip regions and a spacing region between adjacent first chip regions. The method also includes forming a first adhesive layer adhered to the second surface of the wafer, and forming an opening penetrating through the spacing region of the wafer and a plurality of first chips in the first chip regions on sides of the opening. Further, the method includes forming a molding layer in the opening. The molding layer covers a sidewall of the first chip and exposes a top surface of the first chip.

Abstract: A wafer bonding method includes providing a first wafer including a first wafer surface, forming a first metal layer on the first wafer surface, and forming a first annular retaining wall structure including a first annular retaining wall and a second annular retaining wall surrounded by the first annular retaining wall. The first metal layer is formed between the first annular retaining wall and the second annular retaining wall. The method includes providing a second wafer including a second wafer surface, forming a second metal layer on the second wafer surface, and forming a second annular retaining wall structure including a third annular retaining wall and a fourth annular retaining wall surrounded by the third annular retaining wall. The second metal layer is formed between the third annular retaining wall and the fourth annular retaining wall. The method further includes bonding the first metal layer to the second metal layer.

Abstract: A method for manufacturing the image sensor includes providing a substrate structure; forming a mask layer on the substrate structure, the mask layer having openings; depositing a metal grid material covering a surface of the mask layer and a bottom of the openings; and stripping the mask layer for removing a portion of the metal grid material on the top surface of the mask layer. The substrate structure includes: a substrate having a first surface; a plurality of pixels in the substrate; isolation structures around each of the plurality of pixels; and an anti-reflective coating on the first surface of the substrate. The openings include first openings exposing a portion of the first surface of the substrate structure above the isolation structures. A remaining portion of the metal grid material at the bottom of the openings forms metal grids.

Abstract: A packaging structure and a method for fabricating the packaging structure are provided. The method includes providing a wafer. The wafer has a first surface and a second surface opposing to the first surface, and the wafer includes a plurality of first chip regions and a spacing region between adjacent first chip regions. The method also includes forming a first adhesive layer adhered to the second surface of the wafer, and forming an opening penetrating through the spacing region of the wafer and a plurality of first chips in the first chip regions on sides of the opening. Further, the method includes forming a molding layer in the opening. The molding layer covers a sidewall of the first chip and exposes a top surface of the first chip.

Abstract: A semiconductor structure includes providing a substrate including a first surface and a second surface opposite to the first surface. The first surface is a functional surface. The method also includes forming a plastic seal layer on the first surface of the substrate, and performing a thinning-down process on the second surface of the substrate after forming the plastic seal layer. The plastic seal layer provides support for the substrate during the thinning-down process, and thus warping or cracking of the plastic seal layer 240 may be avoided. In addition, the plastic seal layer can also be used as a material for packaging the substrate. Therefore, after the thinning-down process, the plastic seal layer does not need to be removed. As such, the fabrication process is simplified, and the production cost is reduced.

Abstract: Wafer bonding methods and wafer bonding structures are provided. An exemplary wafer bonding method includes providing a first wafer; forming a first interlayer dielectric layer and a first bonding layer passing through the first interlayer dielectric layer on the surface of the first wafer; providing a second wafer; forming a second interlayer dielectric layer and a second bonding layer passing through the second interlayer dielectric layer on surface of the second wafer; forming a self-assembling layer on at least one of a surface of the first interlayer dielectric layer and a surface of the second interlayer dielectric layer; and bonding the first wafer with the second wafer, the first bonding layer and the second bonding layer being fixed with each other, and the first interlayer dielectric layer and the second interlayer dielectric layer being fixed with each other by the self-assembling molecular layer.

Abstract: A wafer bonding method includes providing a first wafer including a first wafer surface, forming a first metal layer on the first wafer surface, and forming a first annular retaining wall structure including a first annular retaining wall and a second annular retaining wall surrounded by the first annular retaining wall. The first metal layer is formed between the first annular retaining wall and the second annular retaining wall. The method includes providing a second wafer including a second wafer surface, forming a second metal layer on the second wafer surface, and forming a second annular retaining wall structure including a third annular retaining wall and a fourth annular retaining wall surrounded by the third annular retaining wall. The second metal layer is formed between the third annular retaining wall and the fourth annular retaining wall. The method further includes bonding the first metal layer to the second metal layer.

Abstract: A liquid crystal display panel is disclosed, which includes: a first substrate with a pixel electrode region and a non-pixel electrode region; a thin film transistor unit disposed on the first substrate a first alignment layer disposed on the pixel electrode region and the non-pixel electrode region; and a plurality of color filter units disposed between the first substrate and the first alignment layer, wherein one of the color filter units includes a color filter opening to expose a part of a drain electrode of the thin film transistor unit. Herein, a region of the pixel electrode without overlapping the thin film transistor unit is defined as a non-overlapping region, the first alignment layer corresponding to the non-overlapping region has a first thickness, the first alignment layer corresponding to the color filter opening has a second thickness, and the second thickness is greater than the first thickness.

Abstract: Wafer bonding methods and wafer bonding structures are provided. An exemplary wafer bonding method includes providing a first wafer; forming a first interlayer dielectric layer and a first bonding layer passing through the first interlayer dielectric layer on the surface of the first wafer; providing a second wafer; forming a second interlayer dielectric layer and a second bonding layer passing through the second interlayer dielectric layer on surface of the second wafer; forming a self-assembling layer on at least one of a surface of the first interlayer dielectric layer and a surface of the second interlayer dielectric layer; and bonding the first wafer with the second wafer, the first bonding layer and the second bonding layer being fixed with each other, and the first interlayer dielectric layer and the second interlayer dielectric layer being fixed with each other by the self-assembling molecular layer.