Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: A semiconductor structure including a substrate, a first dielectric layer disposed on the substrate, a second dielectric layer disposed on the first dielectric layer and in physical contact with the first dielectric layer, an opening on the substrate and having a lower portion through the first dielectric layer and an upper portion through the second dielectric layer, an conductive layer disposed on the second dielectric layer at two sides of the opening and in physical contact with the second dielectric layer, a contact structure disposed in the lower portion of the opening, and a passivation layer covering a top surface of the contact structure, a sidewall of the second dielectric layer, and a sidewall of the conductive layer.

Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.

Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.

Abstract: A cable has two distal ends each provided with a fixing member. The cable includes a cable body and a coating layer. The cable body has two distal ends each protruding outward from the coating layer. The fixing member has an inside formed with a first urging hole and a second urging hole. The first urging hole is not communicated with the second urging hole. Thus, the fixing member is formed with two independent urging holes to closely press and clamp the coating layer and the cable body of the cable respectively, thereby enhancing the tensile strength of the cable.

Abstract: Disclosed is a dual damascene process for a semiconductor device with two low dielectric constant layers in a stack thereof, in which a via hole and a trench connecting with the via hole are formed respectively in the dielectric layers and a conductor is filled in the via hole and the trench to connect with a conductive region below the via hole after a barrier layer between the via hole and the conductive region is removed. A liner is deposited on the sidewalls of the dielectric layers in the via hole and the trench before the removal of the barrier layer to prevent particles of the conductive region such as copper from sputtering up to the dielectric layers when removing the barrier layer. An etch-stop layer inserted between the dielectric layers is pulled back to be spaced from the via hole with a distance to improve the trench-to-via alignment.

Abstract: An alignment mark for increasing the accuracy of an alignment includes a cross pattern, two horizontal line patterns having serrated shape. The cross pattern is typically formed over a scribe line for alignment in semiconductor process. The cross pattern includes a vertical line and a horizontal line. The vertical line is vertical to the scribe line while the horizontal line is parallel to the scribe line. The horizontal patterns which are parallel to the scribe line are respectively connected to one end of the vertical line. The horizontal patterns have serrated patterns which are used to change the shape of a noise signal. The high of the serrated shape pattern is about 3 micro meters while the width of the serrated shape pattern is about 3 micro meters.